CCS endianess (LS1021atwr / CWv2016.01)

vsiles — Mon, 09 May 2016 10:08:55 GMT

Hi,

I am currently toying with ccs from "CodeWarrior Networked Applications Linux Hosted-Offline v2016.01.tar" in order to prepare the secure boot for my LS1021ATWR board. In Secure Boot/Debug Configuration for LS1 in the example to avoid burning the SRKH fuses, it is explained that the values must be swapped before being written in the registers.

Then to release core0, the value 0x01000000 is written in the DCFG_CCSR_BRR register.

I first try to only release core 0 by performing the same write, but nothing happens. However, if I try to write 0x1 instead, the core correctly comes out of reset. It seems the endianess of ccs from the doc is not the same of the one I am using.

Before trying to burn any fuses, I'd like to be sure of the value I need to input in ccs::write_mem command. Can someone clarify the endianess of ccs, or a wait to check it ?

Re: CCS endianess (LS1021atwr / CWv2016.01)

addiyi — Mon, 09 May 2016 11:38:59 GMT

Access via cmsisdap it is little-endian, same as using the core.

Adrian

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CCS endianess (LS1021atwr / CWv2016.01)

Re: CCS endianess (LS1021atwr / CWv2016.01)