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    <title>topic Re: Software reset -- refresh of SRAM in ColdFire/68K Microcontrollers and Processors</title>
    <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/Software-reset-refresh-of-SRAM/m-p/205229#M9659</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Unlike dynamic DRAM (such as DDR or SDRAM), SRAM doesn't need the refresh at all.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Some areas of an SRAM (such as interrupt vector table) will be reinitialized during booting the RTOS+application by the software reset.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 05 Aug 2009 17:32:09 GMT</pubDate>
    <dc:creator>admin</dc:creator>
    <dc:date>2009-08-05T17:32:09Z</dc:date>
    <item>
      <title>Software reset -- refresh of SRAM</title>
      <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/Software-reset-refresh-of-SRAM/m-p/205227#M9657</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp; Does a software reset cause a refresh of SRAM to happen? The controller in use is M52259 [Coldfire V2].&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Chen&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 05 Aug 2009 16:48:29 GMT</pubDate>
      <guid>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/Software-reset-refresh-of-SRAM/m-p/205227#M9657</guid>
      <dc:creator>lel_chen</dc:creator>
      <dc:date>2009-08-05T16:48:29Z</dc:date>
    </item>
    <item>
      <title>Re: Software reset -- refresh of SRAM</title>
      <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/Software-reset-refresh-of-SRAM/m-p/205228#M9658</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;It shouldn't... But maybe you can clarify what you mean by refresh?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;The SRAM will lose state if pwr drops or droops...&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;-JWW&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 05 Aug 2009 17:14:57 GMT</pubDate>
      <guid>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/Software-reset-refresh-of-SRAM/m-p/205228#M9658</guid>
      <dc:creator>JWW</dc:creator>
      <dc:date>2009-08-05T17:14:57Z</dc:date>
    </item>
    <item>
      <title>Re: Software reset -- refresh of SRAM</title>
      <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/Software-reset-refresh-of-SRAM/m-p/205229#M9659</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Unlike dynamic DRAM (such as DDR or SDRAM), SRAM doesn't need the refresh at all.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Some areas of an SRAM (such as interrupt vector table) will be reinitialized during booting the RTOS+application by the software reset.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 05 Aug 2009 17:32:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/Software-reset-refresh-of-SRAM/m-p/205229#M9659</guid>
      <dc:creator>admin</dc:creator>
      <dc:date>2009-08-05T17:32:09Z</dc:date>
    </item>
    <item>
      <title>Re: Software reset -- refresh of SRAM</title>
      <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/Software-reset-refresh-of-SRAM/m-p/205230#M9660</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;I think it's refreshed by code.&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 27 Aug 2009 08:17:23 GMT</pubDate>
      <guid>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/Software-reset-refresh-of-SRAM/m-p/205230#M9660</guid>
      <dc:creator>doom</dc:creator>
      <dc:date>2009-08-27T08:17:23Z</dc:date>
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