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    <title>topic Re: mcf5329, init clock in ColdFire/68K Microcontrollers and Processors</title>
    <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/mcf5329-init-clock/m-p/199591#M9090</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;&lt;/DIV&gt;Hi,&lt;BR /&gt;&lt;BR /&gt;I've downloaded the Reference Manual and had a (admittedly very quick) look ...&lt;BR /&gt;In chapter 7.3.3 it is stated that PFDR can only be modified while in Limp mode !&lt;BR /&gt;So my questions are:&lt;BR /&gt;- Is your cpu in Limp mode ? Because the setting of MISCCR[LIMP] is missing in your function&lt;BR /&gt;- where is your function located ? If it is in DRAM then upon entering Limp mode, refresh would stop and your DRAM loose its contents ... leading to a crash in the process.&lt;BR /&gt;&lt;BR /&gt;HTH&lt;BR /&gt;&amp;nbsp; stzari&lt;BR /&gt;&lt;BR /&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 12 Mar 2008 04:40:02 GMT</pubDate>
    <dc:creator>stzari</dc:creator>
    <dc:date>2008-03-12T04:40:02Z</dc:date>
    <item>
      <title>mcf5329, init clock</title>
      <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/mcf5329-init-clock/m-p/199587#M9086</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt; &lt;/DIV&gt;&lt;DIV&gt;Hello,&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;I want to set the clock in the mcf5329EVB. The oscillator is the 16MHz and I want to work to 180MHz in mode PLL.&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;The function that I write is (copied of the program&amp;nbsp;Coldfire Init):&lt;/DIV&gt;&lt;P&gt;void init_clock_config (void)&lt;BR /&gt;{&lt;BR /&gt;&amp;nbsp;/* Clock module uses normal PLL mode with 16.0000 MHz external reference&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Bus clock frequency = 60.00 MHz&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Processor clock frequency = 3 x bus clock = 180.00 MHz&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Dithering disabled&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; */&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Check to see if the SDRAM has already been initialized&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; by a run control tool. If it has, put SDRAM into self-refresh mode before&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; initializing the PLL&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; */&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; if (MCF_SDRAMC_SDCR &amp;amp; MCF_SDRAMC_SDCR_REF)&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; MCF_SDRAMC_SDCR &amp;amp;= ~MCF_SDRAMC_SDCR_CKE;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Temporarily switch to LIMP mode&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; NOTE: Ensure that this code is not executing from SDRAM, since the&amp;nbsp;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; SDRAM Controller is disabled in LIMP mode&amp;nbsp;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; */&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; MCF_CCM_CDR = (MCF_CCM_CDR &amp;amp; 0xf0ff) | MCF_CCM_CDR_LPDIV(0x2);&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; MCF_CCM_MISCCR |= MCF_CCM_MISCCR_LIMP;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Configure the PLL settings */&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; MCF_PLL_PODR = MCF_PLL_PODR_CPUDIV(0x2) |&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; MCF_PLL_PODR_BUSDIV(0x6);&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; MCF_PLL_PFDR = MCF_PLL_PFDR_MFD(0x5a);&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; MCF_PLL_PLLCR = 0;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; MCF_PLL_PMDR = 0;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Enable PLL and wait for lock */&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; MCF_CCM_MISCCR &amp;amp;= ~MCF_CCM_MISCCR_LIMP;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; while ((MCF_CCM_MISCCR &amp;amp; MCF_CCM_MISCCR_PLL_LOCK) == 0)&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; ;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* If we put the SDRAM into self-refresh mode earlier, restore mode now */&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; if (MCF_SDRAMC_SDCR &amp;amp; MCF_SDRAMC_SDCR_REF)&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; MCF_SDRAMC_SDCR |= MCF_SDRAMC_SDCR_CKE;&lt;/P&gt;&lt;P&gt;}&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;void main()&lt;/P&gt;&lt;P&gt;{&lt;/P&gt;&lt;P&gt;init_clock_config();&lt;/P&gt;&lt;P&gt;******&lt;/P&gt;&lt;P&gt;}&lt;/P&gt;&lt;DIV&gt;&lt;DIV&gt;If I run the program, it does not work well and I do not have a valid signal clock&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;Thanks in advance.&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 05 Mar 2008 19:03:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/mcf5329-init-clock/m-p/199587#M9086</guid>
      <dc:creator>VeronicaFNX</dc:creator>
      <dc:date>2008-03-05T19:03:53Z</dc:date>
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    <item>
      <title>Re: mcf5329, init clock</title>
      <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/mcf5329-init-clock/m-p/199588#M9087</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;Please, I would appreciate it if someone I reply. &lt;IMG alt=":smileysad:" class="emoticon emoticon-smileysad" id="smileysad" src="http://freescale.i.lithium.com/i/smilies/16x16_smiley-sad.gif" title="Smiley Sad" /&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Thanks. Veronica&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 07 Mar 2008 18:59:35 GMT</pubDate>
      <guid>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/mcf5329-init-clock/m-p/199588#M9087</guid>
      <dc:creator>VeronicaFNX</dc:creator>
      <dc:date>2008-03-07T18:59:35Z</dc:date>
    </item>
    <item>
      <title>Re: mcf5329, init clock</title>
      <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/mcf5329-init-clock/m-p/199589#M9088</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;&lt;/DIV&gt;Hi VeronicaFNX,&lt;BR /&gt;&lt;BR /&gt;Not sure, if I can help you (no experience with MCF5329) ... but in most configurations I use, main() is executed from RAM (usually some form of DRAM).&lt;BR /&gt;Since switching to Limp mode will disable the SDRAM controller (as stated in the code), I would expect at least some problems -&amp;nbsp; if you haven't changed your C runtime, of course &lt;SPAN&gt;&lt;IMG alt=":smileywink:" class="emoticon emoticon-smileywink" id="smileywink" src="http://freescale.i.lithium.com/i/smilies/16x16_smiley-wink.gif" title="Smiley Wink" /&gt;&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;HTH&lt;BR /&gt;&amp;nbsp; stzari&lt;BR /&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 11 Mar 2008 23:16:52 GMT</pubDate>
      <guid>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/mcf5329-init-clock/m-p/199589#M9088</guid>
      <dc:creator>stzari</dc:creator>
      <dc:date>2008-03-11T23:16:52Z</dc:date>
    </item>
    <item>
      <title>Re: mcf5329, init clock</title>
      <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/mcf5329-init-clock/m-p/199590#M9089</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;No, I have tried to do,&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;void init_clock_config (void)&lt;BR /&gt;{&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Clock module uses normal PLL mode with 16.0000 MHz external reference&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Bus clock frequency = 80.00 MHz&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Processor clock frequency = 3 x bus clock = 240.00 MHz&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Dithering disabled&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; */&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Configure the PLL settings */&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; MCF_PLL_PODR = MCF_PLL_PODR_CPUDIV(0x2) |&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; MCF_PLL_PODR_BUSDIV(0x6);&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; MCF_PLL_PFDR = MCF_PLL_PFDR_MFD(0x78);&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; MCF_PLL_PLLCR = 0;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; MCF_PLL_PMDR = 0;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Enable PLL and wait for lock */&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; MCF_CCM_MISCCR &amp;amp;= ~MCF_CCM_MISCCR_LIMP;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; while ((MCF_CCM_MISCCR &amp;amp; MCF_CCM_MISCCR_PLL_LOCK) == 0)&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; ;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* From the Device Errata:&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; "After exiting LIMP mode, the value of 0x40000000 should be written&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; to address 0xFC0B8080 before attempting to initialize the SDRAMC&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; or exit the SDRAM from self-refresh mode."&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; */&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; * (vuint32 *) 0xfc0b8080 = 0x40000000;&lt;/DIV&gt;&lt;DIV&gt;&lt;BR /&gt;}&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;and I have the same problem. Always the board works at 60MHz.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Anyway, thanks&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 11 Mar 2008 23:28:22 GMT</pubDate>
      <guid>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/mcf5329-init-clock/m-p/199590#M9089</guid>
      <dc:creator>VeronicaFNX</dc:creator>
      <dc:date>2008-03-11T23:28:22Z</dc:date>
    </item>
    <item>
      <title>Re: mcf5329, init clock</title>
      <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/mcf5329-init-clock/m-p/199591#M9090</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;&lt;/DIV&gt;Hi,&lt;BR /&gt;&lt;BR /&gt;I've downloaded the Reference Manual and had a (admittedly very quick) look ...&lt;BR /&gt;In chapter 7.3.3 it is stated that PFDR can only be modified while in Limp mode !&lt;BR /&gt;So my questions are:&lt;BR /&gt;- Is your cpu in Limp mode ? Because the setting of MISCCR[LIMP] is missing in your function&lt;BR /&gt;- where is your function located ? If it is in DRAM then upon entering Limp mode, refresh would stop and your DRAM loose its contents ... leading to a crash in the process.&lt;BR /&gt;&lt;BR /&gt;HTH&lt;BR /&gt;&amp;nbsp; stzari&lt;BR /&gt;&lt;BR /&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 12 Mar 2008 04:40:02 GMT</pubDate>
      <guid>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/mcf5329-init-clock/m-p/199591#M9090</guid>
      <dc:creator>stzari</dc:creator>
      <dc:date>2008-03-12T04:40:02Z</dc:date>
    </item>
    <item>
      <title>Re: mcf5329, init clock</title>
      <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/mcf5329-init-clock/m-p/199592#M9091</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;Hello,&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;If I put the first code, the program have an exception and don't work.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;So,&amp;nbsp;if I&amp;nbsp;want to work in SDRAM I can not change the frequency?&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Also, I&amp;nbsp;can not to put the program in flash because it says me that "Cannot connect with the BDM" but it is connected.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;It,s very dificult!! &lt;IMG alt=":smileysad:" class="emoticon emoticon-smileysad" id="smileysad" src="http://freescale.i.lithium.com/i/smilies/16x16_smiley-sad.gif" title="Smiley Sad" /&gt;&amp;nbsp;&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 12 Mar 2008 23:17:04 GMT</pubDate>
      <guid>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/mcf5329-init-clock/m-p/199592#M9091</guid>
      <dc:creator>VeronicaFNX</dc:creator>
      <dc:date>2008-03-12T23:17:04Z</dc:date>
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    <item>
      <title>Re: mcf5329, init clock</title>
      <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/mcf5329-init-clock/m-p/199593#M9092</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;Hello,&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;If you are using a debugger, all initialisations (Clock SDRAM etc...)must be done by the debugger initialisation file (xxxxx.cfg for CodeWarrior) at start-up.&lt;BR /&gt;&lt;BR /&gt;Bye&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 13 Mar 2008 17:31:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/mcf5329-init-clock/m-p/199593#M9092</guid>
      <dc:creator>Arev</dc:creator>
      <dc:date>2008-03-13T17:31:50Z</dc:date>
    </item>
    <item>
      <title>Re: mcf5329, init clock</title>
      <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/mcf5329-init-clock/m-p/199594#M9093</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;But I don't know how to do this.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Can you say me the code that I have to put?&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Thanks, I have been several days with it and I am hopeless.&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 13 Mar 2008 18:32:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/mcf5329-init-clock/m-p/199594#M9093</guid>
      <dc:creator>VeronicaFNX</dc:creator>
      <dc:date>2008-03-13T18:32:48Z</dc:date>
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