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    <title>ColdFire/68K Microcontrollers and Processors中的主题 MCF5208 SplitBus</title>
    <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/MCF5208-SplitBus/m-p/130842#M775</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt; &lt;/DIV&gt;&lt;DIV&gt; &lt;/DIV&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;SPAN style="color: #ff0000;"&gt;This message contains an entire topic ported&amp;nbsp;from the WildRice - Coldfire forum.&amp;nbsp; Freescale has received the approval from the WildRice administrator on seeding the Freescale forum with messages.&amp;nbsp; The original message and all replies are in this single message. We have seeded this new forum with selected information that we expect will be of value as you search for answers to your questions.&amp;nbsp;&lt;/SPAN&gt; &lt;SPAN style="color: #ff0000;"&gt;Freescale assumes no responsibility whatsoever with respect to Posted Material.&amp;nbsp; For additional information, please see the &lt;A _jive_internal="true" href="https://community.nxp.com/external-link.jspa?url=http%3A%2F%2Fwww.freescale.com%2Ffiles%2Fabstract%2Fhelp_page%2FTERMSOFUSE.html" rel="nofollow" target="_blank"&gt;&lt;SPAN style="color: #000000;"&gt;Terms of Use - Message Boards and Community Forums&lt;/SPAN&gt;&lt;/A&gt;.&amp;nbsp; Thank You and Enjoy the Forum!&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;BR /&gt;&lt;HR /&gt;Dec 27, 2005, 5:46 AM&lt;/DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;Post #1 of 6 (105 views)&lt;BR /&gt;Copy Shortcut&lt;BR /&gt;&amp;nbsp;[ColdFire] MCF5208 SplitBus&amp;nbsp; Can't Post&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;--------------------------------------------------------------------------------&lt;BR /&gt;&amp;nbsp;&lt;BR /&gt;Hello all,&lt;/DIV&gt;&lt;DIV&gt;I am developping a produced based on Coldfire 5208.&lt;BR /&gt;I will use 16 bits only SDRam and Flash Data Bus because low price is&lt;BR /&gt;very important for this project and I have a very small PCB to route the&lt;BR /&gt;bus.&lt;BR /&gt;Does anyone have a comparative benchmark with a Coldfire 52XX in 16 bits&lt;BR /&gt;and 32 bits mode ?&lt;BR /&gt;Is there an advantage to split the bus ( D[15:0] for SDR SDRAM and&lt;BR /&gt;D[31:16] for the flash) or should I rather share D[0:15 between SDRAM&lt;BR /&gt;and Flash ? If I use split bus with SDR SDRAM, what should be the value&lt;BR /&gt;for DRAMSEL ?&lt;/DIV&gt;&lt;DIV&gt;Thanks for your help.&lt;/DIV&gt;&lt;DIV&gt;Stan&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;--------------------------------------------------------------------&lt;BR /&gt;&lt;/DIV&gt;&lt;DIV&gt;Jan 5, 2006, 3:58 AM&lt;/DIV&gt;&lt;DIV&gt;Post #2 of 6 (97 views)&lt;BR /&gt;Copy Shortcut&lt;BR /&gt;&amp;nbsp;RE: [ColdFire] MCF5208 SplitBus [In reply to]&amp;nbsp; Can't Post&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;--------------------------------------------------------------------------------&lt;BR /&gt;&amp;nbsp;&lt;BR /&gt;Hi,&lt;BR /&gt;I don't have any benchmark but only basic ideas :&lt;BR /&gt;* When you use the split bus feature, in fact you greatly simplify the&lt;BR /&gt;routing =&amp;gt; it's like if you have 2 data buses :&lt;BR /&gt;- one for RAM&lt;BR /&gt;- one for flex (extensions plugged on the bus)&lt;BR /&gt;=&amp;gt; for EEPROM, LAN controller, IDE controller...&lt;BR /&gt;Thus this makes sense only if you need both of them...&lt;/DIV&gt;&lt;DIV&gt;Another advantage is that you use a 3V3 device. Thus you only need 2 powers:&lt;BR /&gt;* 1V5 : core + PLL&lt;BR /&gt;* 3V3 : SD_VDD + EVDD&lt;BR /&gt;When routing data bus to SDRAM you can scramble the bits in the LSB and/or&lt;BR /&gt;MSB and you can invert LSB/MSB if you do the same for DQS and BE signals&lt;BR /&gt;(like in the EVB).&lt;/DIV&gt;&lt;DIV&gt;The counterpart plugging SDR-DRAM in 16 bits is that you must to make 2&lt;BR /&gt;accesses to RAM to get a 32 bits word =&amp;gt; speed divided by 2. But keep in&lt;BR /&gt;mind that DRAM is cached with SRAM working at full speed.&lt;/DIV&gt;&lt;DIV&gt;So the answer is not so easy. It's more a choice.&lt;/DIV&gt;&lt;DIV&gt;Personally, I choosed to use the same structure than in the EVB to make the&lt;BR /&gt;tests easier...&lt;/DIV&gt;&lt;DIV&gt;PS : there is a mistake in the EVB : they inverted #BS0 and #BS1 signals if&lt;BR /&gt;you look accurately.&lt;/DIV&gt;&lt;DIV&gt;&lt;BR /&gt;-----Message d'origine-----&lt;BR /&gt;De : De la&lt;BR /&gt;part de Stan Marly&lt;BR /&gt;Envoyé : mardi 27 décembre 2005 14:46&lt;BR /&gt;Objet : [ColdFire] MCF5208 SplitBus&lt;/DIV&gt;&lt;DIV&gt;Hello all,&lt;/DIV&gt;&lt;DIV&gt;I am developping a produced based on Coldfire 5208.&lt;BR /&gt;I will use 16 bits only SDRam and Flash Data Bus because low price is&lt;BR /&gt;very important for this project and I have a very small PCB to route the&lt;BR /&gt;bus.&lt;BR /&gt;Does anyone have a comparative benchmark with a Coldfire 52XX in 16 bits&lt;BR /&gt;and 32 bits mode ?&lt;BR /&gt;Is there an advantage to split the bus ( D[15:0] for SDR SDRAM and&lt;BR /&gt;D[31:16] for the flash) or should I rather share D[0:15 between SDRAM&lt;BR /&gt;and Flash ? If I use split bus with SDR SDRAM, what should be the value&lt;BR /&gt;for DRAMSEL ?&lt;/DIV&gt;&lt;DIV&gt;Thanks for your help.&lt;/DIV&gt;&lt;DIV&gt;Stan&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;--------------------------------------------------------------------&lt;BR /&gt;&lt;/DIV&gt;&lt;DIV&gt;Jan 9, 2006, 1:45 PM&lt;/DIV&gt;&lt;DIV&gt;Post #3 of 6 (81 views)&lt;BR /&gt;Copy Shortcut&lt;BR /&gt;&amp;nbsp;Re: [Listserv] [ColdFire] MCF5208 SplitBus [In reply to]&amp;nbsp; Can't Post&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;--------------------------------------------------------------------------------&lt;BR /&gt;&amp;nbsp;&lt;BR /&gt;Hi Stan,&lt;BR /&gt;Split bus is specifically intended to be used when using DDR-SDRAM. The D[31:16] for DDR and D[15:0] for Flash/SRAM and other Chip Select devices.&lt;BR /&gt;If you are using SDR-SDRAM, then you do not use the split bus mode.&lt;BR /&gt;In non-split bus mode you can have upto 32-bit port size and if you wish to save dollars and only use 16-bit port size SDR_SDRAM and Flash, they will share the same address and data signals. D[31:16] specifically.&lt;BR /&gt;Non-split bus mode has DRAMSEL pulled high.&lt;BR /&gt;Regards,&lt;BR /&gt;David&lt;BR /&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Jan 10, 2006, 1:30 PM&lt;/DIV&gt;&lt;DIV&gt;Post #4 of 6 (75 views)&lt;BR /&gt;Copy Shortcut&lt;BR /&gt;&amp;nbsp;RE: [ColdFire] MCF5208 SplitBus [In reply to]&amp;nbsp; Can't Post&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;--------------------------------------------------------------------------------&lt;BR /&gt;&amp;nbsp;&lt;BR /&gt;Hi jmo,&lt;/DIV&gt;&lt;DIV&gt;Thanks for your help.&lt;BR /&gt;Is it mendatory to use split bus or can I connect both Ram and Flash to D[0:15] and drive D3 high at reset to select 16 bits mode ? This will make the routing easier since I will only have to route 16 wires for data bus ?&lt;/DIV&gt;&lt;DIV&gt;Thanks.&lt;/DIV&gt;&lt;DIV&gt;Best regards,&lt;/DIV&gt;&lt;DIV&gt;Stan&lt;/DIV&gt;&lt;DIV&gt;-----Message d'origine-----&lt;BR /&gt;De : De la part de jmo&lt;BR /&gt;Envoyé : jeudi 5 janvier 2006 13:46&lt;BR /&gt;À : Stan Marly&lt;BR /&gt;Objet : RE: [ColdFire] MCF5208 SplitBus&lt;/DIV&gt;&lt;DIV&gt;Hi,&lt;BR /&gt;I don't have any benchmark but only basic ideas :&lt;BR /&gt;* When you use the split bus feature, in fact you greatly simplify the routing =&amp;gt; it's like if you have 2 data buses :&lt;BR /&gt;- one for RAM&lt;BR /&gt;- one for flex (extensions plugged on the bus)&lt;BR /&gt;=&amp;gt; for EEPROM, LAN controller, IDE controller...&lt;BR /&gt;Thus this makes sense only if you need both of them...&lt;/DIV&gt;&lt;DIV&gt;Another advantage is that you use a 3V3 device. Thus you only need 2 powers:&lt;BR /&gt;* 1V5 : core + PLL&lt;BR /&gt;* 3V3 : SD_VDD + EVDD&lt;BR /&gt;When routing data bus to SDRAM you can scramble the bits in the LSB and/or MSB and you can invert LSB/MSB if you do the same for DQS and BE signals (like in the EVB).&lt;/DIV&gt;&lt;DIV&gt;The counterpart plugging SDR-DRAM in 16 bits is that you must to make 2 accesses to RAM to get a 32 bits word =&amp;gt; speed divided by 2. But keep in mind that DRAM is cached with SRAM working at full speed.&lt;/DIV&gt;&lt;DIV&gt;So the answer is not so easy. It's more a choice.&lt;/DIV&gt;&lt;DIV&gt;Personally, I choosed to use the same structure than in the EVB to make the tests easier...&lt;/DIV&gt;&lt;DIV&gt;PS : there is a mistake in the EVB : they inverted #BS0 and #BS1 signals if you look accurately.&lt;/DIV&gt;&lt;DIV&gt;&lt;BR /&gt;-----Message d'origine-----&lt;BR /&gt;De : De la part de Stan Marly Envoyé : mardi 27 décembre 2005 14:46 À :&amp;nbsp; Objet : [ColdFire] MCF5208 SplitBus&lt;/DIV&gt;&lt;DIV&gt;Hello all,&lt;/DIV&gt;&lt;DIV&gt;I am developping a produced based on Coldfire 5208.&lt;BR /&gt;I will use 16 bits only SDRam and Flash Data Bus because low price is very important for this project and I have a very small PCB to route the bus.&lt;BR /&gt;Does anyone have a comparative benchmark with a Coldfire 52XX in 16 bits and 32 bits mode ?&lt;BR /&gt;Is there an advantage to split the bus ( D[15:0] for SDR SDRAM and D[31:16] for the flash) or should I rather share D[0:15 between SDRAM and Flash ? If I use split bus with SDR SDRAM, what should be the value for DRAMSEL ?&lt;/DIV&gt;&lt;DIV&gt;Thanks for your help.&lt;/DIV&gt;&lt;DIV&gt;Stan&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;--------------------------------------------------------------------&lt;BR /&gt;&lt;/DIV&gt;&lt;DIV&gt;Jan 13, 2006, 1:09 AM&lt;/DIV&gt;&lt;DIV&gt;Post #5 of 6 (74 views)&lt;BR /&gt;Copy Shortcut&lt;BR /&gt;&amp;nbsp;RE: [ColdFire] MCF5208 SplitBus [In reply to]&amp;nbsp; Can't Post&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;--------------------------------------------------------------------------------&lt;BR /&gt;&amp;nbsp;&lt;BR /&gt;Hi,&lt;BR /&gt;It isn't mandatory to use this feature: it has been made to make life easier&lt;BR /&gt;that's all.&lt;BR /&gt;But my advice takes this form: try to use this µC in a way as closer as&lt;BR /&gt;possible than they did in the EVB.&lt;BR /&gt;Reasons:&lt;BR /&gt;* Some of the behaviours are unclear (this device is very to new)&lt;BR /&gt;* Thus testing your board can become a nightmare without a&lt;BR /&gt;comparison point.&lt;BR /&gt;When I was at this point (like you are now), I made this choice and changed&lt;BR /&gt;my design to reach that.&lt;/DIV&gt;&lt;DIV&gt;Regards&lt;/DIV&gt;&lt;DIV&gt;-----Message d'origine-----&lt;BR /&gt;De : De la&lt;BR /&gt;part de Stan Marly&lt;BR /&gt;Envoyé : mardi 10 janvier 2006 22:30&lt;BR /&gt;Objet : RE: [ColdFire] MCF5208 SplitBus&lt;/DIV&gt;&lt;DIV&gt;Hi jmo,&lt;/DIV&gt;&lt;DIV&gt;Thanks for your help.&lt;BR /&gt;Is it mendatory to use split bus or can I connect both Ram and Flash to&lt;BR /&gt;D[0:15] and drive D3 high at reset to select 16 bits mode ? This will make&lt;BR /&gt;the routing easier since I will only have to route 16 wires for data bus ?&lt;/DIV&gt;&lt;DIV&gt;Thanks.&lt;/DIV&gt;&lt;DIV&gt;Best regards,&lt;/DIV&gt;&lt;DIV&gt;Stan&lt;/DIV&gt;&lt;DIV&gt;-----Message d'origine-----&lt;BR /&gt;De : De la&lt;BR /&gt;part de jmo&lt;BR /&gt;Envoyé : jeudi 5 janvier 2006 13:46&lt;BR /&gt;À : Stan Marly&lt;BR /&gt;Objet : RE: [ColdFire] MCF5208 SplitBus&lt;/DIV&gt;&lt;DIV&gt;Hi,&lt;BR /&gt;I don't have any benchmark but only basic ideas :&lt;BR /&gt;* When you use the split bus feature, in fact you greatly simplify the&lt;BR /&gt;routing =&amp;gt; it's like if you have 2 data buses :&lt;BR /&gt;- one for RAM&lt;BR /&gt;- one for flex (extensions plugged on the bus)&lt;BR /&gt;=&amp;gt; for EEPROM, LAN controller, IDE controller...&lt;BR /&gt;Thus this makes sense only if you need both of them...&lt;/DIV&gt;&lt;DIV&gt;Another advantage is that you use a 3V3 device. Thus you only need 2 powers:&lt;BR /&gt;* 1V5 : core + PLL&lt;BR /&gt;* 3V3 : SD_VDD + EVDD&lt;BR /&gt;When routing data bus to SDRAM you can scramble the bits in the LSB and/or&lt;BR /&gt;MSB and you can invert LSB/MSB if you do the same for DQS and BE signals&lt;BR /&gt;(like in the EVB).&lt;/DIV&gt;&lt;DIV&gt;The counterpart plugging SDR-DRAM in 16 bits is that you must to make 2&lt;BR /&gt;accesses to RAM to get a 32 bits word =&amp;gt; speed divided by 2. But keep in&lt;BR /&gt;mind that DRAM is cached with SRAM working at full speed.&lt;/DIV&gt;&lt;DIV&gt;So the answer is not so easy. It's more a choice.&lt;/DIV&gt;&lt;DIV&gt;Personally, I choosed to use the same structure than in the EVB to make the&lt;BR /&gt;tests easier...&lt;/DIV&gt;&lt;DIV&gt;PS : there is a mistake in the EVB : they inverted #BS0 and #BS1 signals if&lt;BR /&gt;you look accurately.&lt;/DIV&gt;&lt;DIV&gt;&lt;BR /&gt;-----Message d'origine-----&lt;BR /&gt;De : De la&lt;BR /&gt;part de Stan Marly Envoyé : mardi 27 décembre 2005 14:46 À :&lt;BR /&gt;Objet : [ColdFire] MCF5208 SplitBus&lt;/DIV&gt;&lt;DIV&gt;Hello all,&lt;/DIV&gt;&lt;DIV&gt;I am developping a produced based on Coldfire 5208.&lt;BR /&gt;I will use 16 bits only SDRam and Flash Data Bus because low price is very&lt;BR /&gt;important for this project and I have a very small PCB to route the bus.&lt;BR /&gt;Does anyone have a comparative benchmark with a Coldfire 52XX in 16 bits and&lt;BR /&gt;32 bits mode ?&lt;BR /&gt;Is there an advantage to split the bus ( D[15:0] for SDR SDRAM and D[31:16]&lt;BR /&gt;for the flash) or should I rather share D[0:15 between SDRAM and Flash ? If&lt;BR /&gt;I use split bus with SDR SDRAM, what should be the value for DRAMSEL ?&lt;/DIV&gt;&lt;DIV&gt;Thanks for your help.&lt;/DIV&gt;&lt;DIV&gt;Stan&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;--------------------------------------------------------------------&lt;BR /&gt;&lt;/DIV&gt;&lt;DIV&gt;Jan 19, 2006, 4:20 PM&lt;/DIV&gt;&lt;DIV&gt;Post #6 of 6 (65 views)&lt;BR /&gt;Copy Shortcut&lt;BR /&gt;&amp;nbsp;[ColdFire] MCF5208 Heads up.... [In reply to]&amp;nbsp; Can't Post&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;--------------------------------------------------------------------------------&lt;BR /&gt;&amp;nbsp;&lt;BR /&gt;I found my 5208 bug today.&lt;BR /&gt;As always it was my problem, but it was subtle.&lt;/DIV&gt;&lt;DIV&gt;The 5282 and 5270 have interrupt controllers with&lt;BR /&gt;registers called icrn with in the interrupt controller subsystem&lt;/DIV&gt;&lt;DIV&gt;The 5208 also has the same registers in the same subsystem...&lt;BR /&gt;Both sets of registers are the same size, 8 bits.&lt;/DIV&gt;&lt;DIV&gt;Alas the bit positions are different between the devices.&lt;/DIV&gt;&lt;DIV&gt;The end result was that my Ethernet interrupt was setup as nonmaskable,&lt;BR /&gt;and if it occurred in exactly the wrong place (when it was supposed&lt;BR /&gt;to be masked off)&lt;BR /&gt;it corrupted the RTOS logic.&lt;/DIV&gt;&lt;DIV&gt;This took me forever to find, so I hope I can save someone porting to&lt;BR /&gt;the 5208 some grief.&lt;/DIV&gt;&lt;DIV&gt;Paul&lt;BR /&gt;&amp;nbsp;&lt;BR /&gt;&amp;nbsp;&lt;BR /&gt;&amp;nbsp;&lt;BR /&gt;&lt;/DIV&gt;&lt;P&gt;Message Edited by Dietrich on &lt;SPAN class="date_text"&gt;04-01-2006&lt;/SPAN&gt; &lt;SPAN class="time_text"&gt;11:36 AM&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;Message Edited by Dietrich on &lt;SPAN class="date_text"&gt;04-04-2006&lt;/SPAN&gt; &lt;SPAN class="time_text"&gt;09:34 PM&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Sat, 01 Apr 2006 06:31:25 GMT</pubDate>
    <dc:creator>Dietrich</dc:creator>
    <dc:date>2006-04-01T06:31:25Z</dc:date>
    <item>
      <title>MCF5208 SplitBus</title>
      <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/MCF5208-SplitBus/m-p/130842#M775</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt; &lt;/DIV&gt;&lt;DIV&gt; &lt;/DIV&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;SPAN style="color: #ff0000;"&gt;This message contains an entire topic ported&amp;nbsp;from the WildRice - Coldfire forum.&amp;nbsp; Freescale has received the approval from the WildRice administrator on seeding the Freescale forum with messages.&amp;nbsp; The original message and all replies are in this single message. We have seeded this new forum with selected information that we expect will be of value as you search for answers to your questions.&amp;nbsp;&lt;/SPAN&gt; &lt;SPAN style="color: #ff0000;"&gt;Freescale assumes no responsibility whatsoever with respect to Posted Material.&amp;nbsp; For additional information, please see the &lt;A _jive_internal="true" href="https://community.nxp.com/external-link.jspa?url=http%3A%2F%2Fwww.freescale.com%2Ffiles%2Fabstract%2Fhelp_page%2FTERMSOFUSE.html" rel="nofollow" target="_blank"&gt;&lt;SPAN style="color: #000000;"&gt;Terms of Use - Message Boards and Community Forums&lt;/SPAN&gt;&lt;/A&gt;.&amp;nbsp; Thank You and Enjoy the Forum!&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;BR /&gt;&lt;HR /&gt;Dec 27, 2005, 5:46 AM&lt;/DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;Post #1 of 6 (105 views)&lt;BR /&gt;Copy Shortcut&lt;BR /&gt;&amp;nbsp;[ColdFire] MCF5208 SplitBus&amp;nbsp; Can't Post&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;--------------------------------------------------------------------------------&lt;BR /&gt;&amp;nbsp;&lt;BR /&gt;Hello all,&lt;/DIV&gt;&lt;DIV&gt;I am developping a produced based on Coldfire 5208.&lt;BR /&gt;I will use 16 bits only SDRam and Flash Data Bus because low price is&lt;BR /&gt;very important for this project and I have a very small PCB to route the&lt;BR /&gt;bus.&lt;BR /&gt;Does anyone have a comparative benchmark with a Coldfire 52XX in 16 bits&lt;BR /&gt;and 32 bits mode ?&lt;BR /&gt;Is there an advantage to split the bus ( D[15:0] for SDR SDRAM and&lt;BR /&gt;D[31:16] for the flash) or should I rather share D[0:15 between SDRAM&lt;BR /&gt;and Flash ? If I use split bus with SDR SDRAM, what should be the value&lt;BR /&gt;for DRAMSEL ?&lt;/DIV&gt;&lt;DIV&gt;Thanks for your help.&lt;/DIV&gt;&lt;DIV&gt;Stan&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;--------------------------------------------------------------------&lt;BR /&gt;&lt;/DIV&gt;&lt;DIV&gt;Jan 5, 2006, 3:58 AM&lt;/DIV&gt;&lt;DIV&gt;Post #2 of 6 (97 views)&lt;BR /&gt;Copy Shortcut&lt;BR /&gt;&amp;nbsp;RE: [ColdFire] MCF5208 SplitBus [In reply to]&amp;nbsp; Can't Post&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;--------------------------------------------------------------------------------&lt;BR /&gt;&amp;nbsp;&lt;BR /&gt;Hi,&lt;BR /&gt;I don't have any benchmark but only basic ideas :&lt;BR /&gt;* When you use the split bus feature, in fact you greatly simplify the&lt;BR /&gt;routing =&amp;gt; it's like if you have 2 data buses :&lt;BR /&gt;- one for RAM&lt;BR /&gt;- one for flex (extensions plugged on the bus)&lt;BR /&gt;=&amp;gt; for EEPROM, LAN controller, IDE controller...&lt;BR /&gt;Thus this makes sense only if you need both of them...&lt;/DIV&gt;&lt;DIV&gt;Another advantage is that you use a 3V3 device. Thus you only need 2 powers:&lt;BR /&gt;* 1V5 : core + PLL&lt;BR /&gt;* 3V3 : SD_VDD + EVDD&lt;BR /&gt;When routing data bus to SDRAM you can scramble the bits in the LSB and/or&lt;BR /&gt;MSB and you can invert LSB/MSB if you do the same for DQS and BE signals&lt;BR /&gt;(like in the EVB).&lt;/DIV&gt;&lt;DIV&gt;The counterpart plugging SDR-DRAM in 16 bits is that you must to make 2&lt;BR /&gt;accesses to RAM to get a 32 bits word =&amp;gt; speed divided by 2. But keep in&lt;BR /&gt;mind that DRAM is cached with SRAM working at full speed.&lt;/DIV&gt;&lt;DIV&gt;So the answer is not so easy. It's more a choice.&lt;/DIV&gt;&lt;DIV&gt;Personally, I choosed to use the same structure than in the EVB to make the&lt;BR /&gt;tests easier...&lt;/DIV&gt;&lt;DIV&gt;PS : there is a mistake in the EVB : they inverted #BS0 and #BS1 signals if&lt;BR /&gt;you look accurately.&lt;/DIV&gt;&lt;DIV&gt;&lt;BR /&gt;-----Message d'origine-----&lt;BR /&gt;De : De la&lt;BR /&gt;part de Stan Marly&lt;BR /&gt;Envoyé : mardi 27 décembre 2005 14:46&lt;BR /&gt;Objet : [ColdFire] MCF5208 SplitBus&lt;/DIV&gt;&lt;DIV&gt;Hello all,&lt;/DIV&gt;&lt;DIV&gt;I am developping a produced based on Coldfire 5208.&lt;BR /&gt;I will use 16 bits only SDRam and Flash Data Bus because low price is&lt;BR /&gt;very important for this project and I have a very small PCB to route the&lt;BR /&gt;bus.&lt;BR /&gt;Does anyone have a comparative benchmark with a Coldfire 52XX in 16 bits&lt;BR /&gt;and 32 bits mode ?&lt;BR /&gt;Is there an advantage to split the bus ( D[15:0] for SDR SDRAM and&lt;BR /&gt;D[31:16] for the flash) or should I rather share D[0:15 between SDRAM&lt;BR /&gt;and Flash ? If I use split bus with SDR SDRAM, what should be the value&lt;BR /&gt;for DRAMSEL ?&lt;/DIV&gt;&lt;DIV&gt;Thanks for your help.&lt;/DIV&gt;&lt;DIV&gt;Stan&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;--------------------------------------------------------------------&lt;BR /&gt;&lt;/DIV&gt;&lt;DIV&gt;Jan 9, 2006, 1:45 PM&lt;/DIV&gt;&lt;DIV&gt;Post #3 of 6 (81 views)&lt;BR /&gt;Copy Shortcut&lt;BR /&gt;&amp;nbsp;Re: [Listserv] [ColdFire] MCF5208 SplitBus [In reply to]&amp;nbsp; Can't Post&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;--------------------------------------------------------------------------------&lt;BR /&gt;&amp;nbsp;&lt;BR /&gt;Hi Stan,&lt;BR /&gt;Split bus is specifically intended to be used when using DDR-SDRAM. The D[31:16] for DDR and D[15:0] for Flash/SRAM and other Chip Select devices.&lt;BR /&gt;If you are using SDR-SDRAM, then you do not use the split bus mode.&lt;BR /&gt;In non-split bus mode you can have upto 32-bit port size and if you wish to save dollars and only use 16-bit port size SDR_SDRAM and Flash, they will share the same address and data signals. D[31:16] specifically.&lt;BR /&gt;Non-split bus mode has DRAMSEL pulled high.&lt;BR /&gt;Regards,&lt;BR /&gt;David&lt;BR /&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Jan 10, 2006, 1:30 PM&lt;/DIV&gt;&lt;DIV&gt;Post #4 of 6 (75 views)&lt;BR /&gt;Copy Shortcut&lt;BR /&gt;&amp;nbsp;RE: [ColdFire] MCF5208 SplitBus [In reply to]&amp;nbsp; Can't Post&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;--------------------------------------------------------------------------------&lt;BR /&gt;&amp;nbsp;&lt;BR /&gt;Hi jmo,&lt;/DIV&gt;&lt;DIV&gt;Thanks for your help.&lt;BR /&gt;Is it mendatory to use split bus or can I connect both Ram and Flash to D[0:15] and drive D3 high at reset to select 16 bits mode ? This will make the routing easier since I will only have to route 16 wires for data bus ?&lt;/DIV&gt;&lt;DIV&gt;Thanks.&lt;/DIV&gt;&lt;DIV&gt;Best regards,&lt;/DIV&gt;&lt;DIV&gt;Stan&lt;/DIV&gt;&lt;DIV&gt;-----Message d'origine-----&lt;BR /&gt;De : De la part de jmo&lt;BR /&gt;Envoyé : jeudi 5 janvier 2006 13:46&lt;BR /&gt;À : Stan Marly&lt;BR /&gt;Objet : RE: [ColdFire] MCF5208 SplitBus&lt;/DIV&gt;&lt;DIV&gt;Hi,&lt;BR /&gt;I don't have any benchmark but only basic ideas :&lt;BR /&gt;* When you use the split bus feature, in fact you greatly simplify the routing =&amp;gt; it's like if you have 2 data buses :&lt;BR /&gt;- one for RAM&lt;BR /&gt;- one for flex (extensions plugged on the bus)&lt;BR /&gt;=&amp;gt; for EEPROM, LAN controller, IDE controller...&lt;BR /&gt;Thus this makes sense only if you need both of them...&lt;/DIV&gt;&lt;DIV&gt;Another advantage is that you use a 3V3 device. Thus you only need 2 powers:&lt;BR /&gt;* 1V5 : core + PLL&lt;BR /&gt;* 3V3 : SD_VDD + EVDD&lt;BR /&gt;When routing data bus to SDRAM you can scramble the bits in the LSB and/or MSB and you can invert LSB/MSB if you do the same for DQS and BE signals (like in the EVB).&lt;/DIV&gt;&lt;DIV&gt;The counterpart plugging SDR-DRAM in 16 bits is that you must to make 2 accesses to RAM to get a 32 bits word =&amp;gt; speed divided by 2. But keep in mind that DRAM is cached with SRAM working at full speed.&lt;/DIV&gt;&lt;DIV&gt;So the answer is not so easy. It's more a choice.&lt;/DIV&gt;&lt;DIV&gt;Personally, I choosed to use the same structure than in the EVB to make the tests easier...&lt;/DIV&gt;&lt;DIV&gt;PS : there is a mistake in the EVB : they inverted #BS0 and #BS1 signals if you look accurately.&lt;/DIV&gt;&lt;DIV&gt;&lt;BR /&gt;-----Message d'origine-----&lt;BR /&gt;De : De la part de Stan Marly Envoyé : mardi 27 décembre 2005 14:46 À :&amp;nbsp; Objet : [ColdFire] MCF5208 SplitBus&lt;/DIV&gt;&lt;DIV&gt;Hello all,&lt;/DIV&gt;&lt;DIV&gt;I am developping a produced based on Coldfire 5208.&lt;BR /&gt;I will use 16 bits only SDRam and Flash Data Bus because low price is very important for this project and I have a very small PCB to route the bus.&lt;BR /&gt;Does anyone have a comparative benchmark with a Coldfire 52XX in 16 bits and 32 bits mode ?&lt;BR /&gt;Is there an advantage to split the bus ( D[15:0] for SDR SDRAM and D[31:16] for the flash) or should I rather share D[0:15 between SDRAM and Flash ? If I use split bus with SDR SDRAM, what should be the value for DRAMSEL ?&lt;/DIV&gt;&lt;DIV&gt;Thanks for your help.&lt;/DIV&gt;&lt;DIV&gt;Stan&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;--------------------------------------------------------------------&lt;BR /&gt;&lt;/DIV&gt;&lt;DIV&gt;Jan 13, 2006, 1:09 AM&lt;/DIV&gt;&lt;DIV&gt;Post #5 of 6 (74 views)&lt;BR /&gt;Copy Shortcut&lt;BR /&gt;&amp;nbsp;RE: [ColdFire] MCF5208 SplitBus [In reply to]&amp;nbsp; Can't Post&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;--------------------------------------------------------------------------------&lt;BR /&gt;&amp;nbsp;&lt;BR /&gt;Hi,&lt;BR /&gt;It isn't mandatory to use this feature: it has been made to make life easier&lt;BR /&gt;that's all.&lt;BR /&gt;But my advice takes this form: try to use this µC in a way as closer as&lt;BR /&gt;possible than they did in the EVB.&lt;BR /&gt;Reasons:&lt;BR /&gt;* Some of the behaviours are unclear (this device is very to new)&lt;BR /&gt;* Thus testing your board can become a nightmare without a&lt;BR /&gt;comparison point.&lt;BR /&gt;When I was at this point (like you are now), I made this choice and changed&lt;BR /&gt;my design to reach that.&lt;/DIV&gt;&lt;DIV&gt;Regards&lt;/DIV&gt;&lt;DIV&gt;-----Message d'origine-----&lt;BR /&gt;De : De la&lt;BR /&gt;part de Stan Marly&lt;BR /&gt;Envoyé : mardi 10 janvier 2006 22:30&lt;BR /&gt;Objet : RE: [ColdFire] MCF5208 SplitBus&lt;/DIV&gt;&lt;DIV&gt;Hi jmo,&lt;/DIV&gt;&lt;DIV&gt;Thanks for your help.&lt;BR /&gt;Is it mendatory to use split bus or can I connect both Ram and Flash to&lt;BR /&gt;D[0:15] and drive D3 high at reset to select 16 bits mode ? This will make&lt;BR /&gt;the routing easier since I will only have to route 16 wires for data bus ?&lt;/DIV&gt;&lt;DIV&gt;Thanks.&lt;/DIV&gt;&lt;DIV&gt;Best regards,&lt;/DIV&gt;&lt;DIV&gt;Stan&lt;/DIV&gt;&lt;DIV&gt;-----Message d'origine-----&lt;BR /&gt;De : De la&lt;BR /&gt;part de jmo&lt;BR /&gt;Envoyé : jeudi 5 janvier 2006 13:46&lt;BR /&gt;À : Stan Marly&lt;BR /&gt;Objet : RE: [ColdFire] MCF5208 SplitBus&lt;/DIV&gt;&lt;DIV&gt;Hi,&lt;BR /&gt;I don't have any benchmark but only basic ideas :&lt;BR /&gt;* When you use the split bus feature, in fact you greatly simplify the&lt;BR /&gt;routing =&amp;gt; it's like if you have 2 data buses :&lt;BR /&gt;- one for RAM&lt;BR /&gt;- one for flex (extensions plugged on the bus)&lt;BR /&gt;=&amp;gt; for EEPROM, LAN controller, IDE controller...&lt;BR /&gt;Thus this makes sense only if you need both of them...&lt;/DIV&gt;&lt;DIV&gt;Another advantage is that you use a 3V3 device. Thus you only need 2 powers:&lt;BR /&gt;* 1V5 : core + PLL&lt;BR /&gt;* 3V3 : SD_VDD + EVDD&lt;BR /&gt;When routing data bus to SDRAM you can scramble the bits in the LSB and/or&lt;BR /&gt;MSB and you can invert LSB/MSB if you do the same for DQS and BE signals&lt;BR /&gt;(like in the EVB).&lt;/DIV&gt;&lt;DIV&gt;The counterpart plugging SDR-DRAM in 16 bits is that you must to make 2&lt;BR /&gt;accesses to RAM to get a 32 bits word =&amp;gt; speed divided by 2. But keep in&lt;BR /&gt;mind that DRAM is cached with SRAM working at full speed.&lt;/DIV&gt;&lt;DIV&gt;So the answer is not so easy. It's more a choice.&lt;/DIV&gt;&lt;DIV&gt;Personally, I choosed to use the same structure than in the EVB to make the&lt;BR /&gt;tests easier...&lt;/DIV&gt;&lt;DIV&gt;PS : there is a mistake in the EVB : they inverted #BS0 and #BS1 signals if&lt;BR /&gt;you look accurately.&lt;/DIV&gt;&lt;DIV&gt;&lt;BR /&gt;-----Message d'origine-----&lt;BR /&gt;De : De la&lt;BR /&gt;part de Stan Marly Envoyé : mardi 27 décembre 2005 14:46 À :&lt;BR /&gt;Objet : [ColdFire] MCF5208 SplitBus&lt;/DIV&gt;&lt;DIV&gt;Hello all,&lt;/DIV&gt;&lt;DIV&gt;I am developping a produced based on Coldfire 5208.&lt;BR /&gt;I will use 16 bits only SDRam and Flash Data Bus because low price is very&lt;BR /&gt;important for this project and I have a very small PCB to route the bus.&lt;BR /&gt;Does anyone have a comparative benchmark with a Coldfire 52XX in 16 bits and&lt;BR /&gt;32 bits mode ?&lt;BR /&gt;Is there an advantage to split the bus ( D[15:0] for SDR SDRAM and D[31:16]&lt;BR /&gt;for the flash) or should I rather share D[0:15 between SDRAM and Flash ? If&lt;BR /&gt;I use split bus with SDR SDRAM, what should be the value for DRAMSEL ?&lt;/DIV&gt;&lt;DIV&gt;Thanks for your help.&lt;/DIV&gt;&lt;DIV&gt;Stan&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;--------------------------------------------------------------------&lt;BR /&gt;&lt;/DIV&gt;&lt;DIV&gt;Jan 19, 2006, 4:20 PM&lt;/DIV&gt;&lt;DIV&gt;Post #6 of 6 (65 views)&lt;BR /&gt;Copy Shortcut&lt;BR /&gt;&amp;nbsp;[ColdFire] MCF5208 Heads up.... [In reply to]&amp;nbsp; Can't Post&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;--------------------------------------------------------------------------------&lt;BR /&gt;&amp;nbsp;&lt;BR /&gt;I found my 5208 bug today.&lt;BR /&gt;As always it was my problem, but it was subtle.&lt;/DIV&gt;&lt;DIV&gt;The 5282 and 5270 have interrupt controllers with&lt;BR /&gt;registers called icrn with in the interrupt controller subsystem&lt;/DIV&gt;&lt;DIV&gt;The 5208 also has the same registers in the same subsystem...&lt;BR /&gt;Both sets of registers are the same size, 8 bits.&lt;/DIV&gt;&lt;DIV&gt;Alas the bit positions are different between the devices.&lt;/DIV&gt;&lt;DIV&gt;The end result was that my Ethernet interrupt was setup as nonmaskable,&lt;BR /&gt;and if it occurred in exactly the wrong place (when it was supposed&lt;BR /&gt;to be masked off)&lt;BR /&gt;it corrupted the RTOS logic.&lt;/DIV&gt;&lt;DIV&gt;This took me forever to find, so I hope I can save someone porting to&lt;BR /&gt;the 5208 some grief.&lt;/DIV&gt;&lt;DIV&gt;Paul&lt;BR /&gt;&amp;nbsp;&lt;BR /&gt;&amp;nbsp;&lt;BR /&gt;&amp;nbsp;&lt;BR /&gt;&lt;/DIV&gt;&lt;P&gt;Message Edited by Dietrich on &lt;SPAN class="date_text"&gt;04-01-2006&lt;/SPAN&gt; &lt;SPAN class="time_text"&gt;11:36 AM&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;Message Edited by Dietrich on &lt;SPAN class="date_text"&gt;04-04-2006&lt;/SPAN&gt; &lt;SPAN class="time_text"&gt;09:34 PM&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sat, 01 Apr 2006 06:31:25 GMT</pubDate>
      <guid>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/MCF5208-SplitBus/m-p/130842#M775</guid>
      <dc:creator>Dietrich</dc:creator>
      <dc:date>2006-04-01T06:31:25Z</dc:date>
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