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    <title>ColdFire/68K Microcontrollers and ProcessorsのトピックMCF52235 - BRAS with gcc</title>
    <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/MCF52235-BRAS-with-gcc/m-p/130772#M762</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt; &lt;/DIV&gt;&lt;DIV&gt; &lt;/DIV&gt;&lt;SPAN&gt;I've noticed that gcc will produse BRAS (some form of BCC) instructions when compiled with the -mcpu=52235 option. But I can't seem to find this instruction documented anywhere, at least not in the &lt;/SPAN&gt;&lt;A _jive_internal="true" href="https://community.nxp.com/external-link.jspa?url=http%3A%2F%2Fwww.freescale.com%2Ffiles%2Fdsp%2Fdoc%2Fref_manual%2FCFPRM.pdf%3Ffsrch%3D1" rel="nofollow" target="_blank"&gt;CFPRM&lt;/A&gt;&lt;SPAN&gt; or the &lt;/SPAN&gt;&lt;A _jive_internal="true" href="https://community.nxp.com/external-link.jspa?url=http%3A%2F%2Fwww.freescale.com%2Ffiles%2F32bit%2Fdoc%2Fref_manual%2FMCF52235RM.pdf%3Ffsrch%3D1" rel="nofollow" target="_blank"&gt;MCF52235RM&lt;/A&gt;&lt;SPAN&gt;?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN style="font-size: 1;"&gt;--&lt;BR /&gt;Alban Edit: Product must show in subject line + explanatory subject&lt;/SPAN&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;BR /&gt;&lt;DIV&gt; &lt;/DIV&gt;&lt;P&gt;Message Edited by Alban on &lt;SPAN class="date_text"&gt;2007-04-17&lt;/SPAN&gt; &lt;SPAN class="time_text"&gt;11:40 AM&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 17 Apr 2007 05:10:10 GMT</pubDate>
    <dc:creator>Petter</dc:creator>
    <dc:date>2007-04-17T05:10:10Z</dc:date>
    <item>
      <title>MCF52235 - BRAS with gcc</title>
      <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/MCF52235-BRAS-with-gcc/m-p/130772#M762</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt; &lt;/DIV&gt;&lt;DIV&gt; &lt;/DIV&gt;&lt;SPAN&gt;I've noticed that gcc will produse BRAS (some form of BCC) instructions when compiled with the -mcpu=52235 option. But I can't seem to find this instruction documented anywhere, at least not in the &lt;/SPAN&gt;&lt;A _jive_internal="true" href="https://community.nxp.com/external-link.jspa?url=http%3A%2F%2Fwww.freescale.com%2Ffiles%2Fdsp%2Fdoc%2Fref_manual%2FCFPRM.pdf%3Ffsrch%3D1" rel="nofollow" target="_blank"&gt;CFPRM&lt;/A&gt;&lt;SPAN&gt; or the &lt;/SPAN&gt;&lt;A _jive_internal="true" href="https://community.nxp.com/external-link.jspa?url=http%3A%2F%2Fwww.freescale.com%2Ffiles%2F32bit%2Fdoc%2Fref_manual%2FMCF52235RM.pdf%3Ffsrch%3D1" rel="nofollow" target="_blank"&gt;MCF52235RM&lt;/A&gt;&lt;SPAN&gt;?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN style="font-size: 1;"&gt;--&lt;BR /&gt;Alban Edit: Product must show in subject line + explanatory subject&lt;/SPAN&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;BR /&gt;&lt;DIV&gt; &lt;/DIV&gt;&lt;P&gt;Message Edited by Alban on &lt;SPAN class="date_text"&gt;2007-04-17&lt;/SPAN&gt; &lt;SPAN class="time_text"&gt;11:40 AM&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 17 Apr 2007 05:10:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/MCF52235-BRAS-with-gcc/m-p/130772#M762</guid>
      <dc:creator>Petter</dc:creator>
      <dc:date>2007-04-17T05:10:10Z</dc:date>
    </item>
    <item>
      <title>Re: BRAS</title>
      <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/MCF52235-BRAS-with-gcc/m-p/130773#M763</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;Is it BRAS or BRA.S?&lt;BR /&gt;Anyway, I would check the code pattern it generates and compare it with the BRA.S (bra.b) one, sounds like just an alias.&lt;BR /&gt;&lt;BR /&gt;Daniel&lt;BR /&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 17 Apr 2007 05:51:21 GMT</pubDate>
      <guid>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/MCF52235-BRAS-with-gcc/m-p/130773#M763</guid>
      <dc:creator>CompilerGuru</dc:creator>
      <dc:date>2007-04-17T05:51:21Z</dc:date>
    </item>
    <item>
      <title>Re: MCF52235 - BRAS with gcc</title>
      <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/MCF52235-BRAS-with-gcc/m-p/130774#M764</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;&lt;/DIV&gt;Of course it is. Here's the output from m68k-elf-objdump:&lt;P&gt;208a: 6036 bras 20c2&lt;/P&gt;&lt;P&gt;Been reading more RISC code than CISC code lately. I erroneously assumed that 6 was BCC where 0 was some new conditional option. But 60 is BRA as you suggest. Thanks.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 17 Apr 2007 23:02:59 GMT</pubDate>
      <guid>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/MCF52235-BRAS-with-gcc/m-p/130774#M764</guid>
      <dc:creator>Petter</dc:creator>
      <dc:date>2007-04-17T23:02:59Z</dc:date>
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