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    <title>topic Re: QSPI Interrupt service routine  is not getting fired in ColdFire/68K Microcontrollers and Processors</title>
    <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/QSPI-Interrupt-service-routine-is-not-getting-fired/m-p/181806#M7407</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&amp;gt; Please let me know if i missed any step&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Nothing onbiously missed.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I'd check the values in all relevant registers with a debugger to make sure all the register definitions are correct. If you don't have a debugger, print the registers out (the relevane interrupt masks, status, ICR and so on).&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Make sure all your ICR registers have UNIQUE IL and IP values. You can't have any ICRs with the same values.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Examine the interrupt table and make sure "vector52" is at the address you expect (0x52 * 4).&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I'd suggest that, with the CPU IPL set to IPL7, do the following in the debugger or write code to do this:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;1 - Print out IPRL0, IPRM0, QIR.&lt;/P&gt;&lt;P&gt;2 - Start the QSPI, and wait for QIR[SPIF] to set.&lt;/P&gt;&lt;P&gt;3 - Check to see if IPRL0[18] has now set.&lt;/P&gt;&lt;P&gt;4 - Check to see that IRLR0 is now showing IRQ4 active.&lt;/P&gt;&lt;P&gt;5 - Read the Global SWIACK and LnIACK registers. Check the vector.&lt;/P&gt;&lt;P&gt;6 - Drop the CPU IPL to zero (or less than 4), the interrupt should trigger.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;You could also use INTFRCL0 to try and force the interrupt from within the controller.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Following the above should find where it isn't working.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Tom&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 23 Jul 2012 21:31:54 GMT</pubDate>
    <dc:creator>TomE</dc:creator>
    <dc:date>2012-07-23T21:31:54Z</dc:date>
    <item>
      <title>QSPI Interrupt service routine  is not getting fired</title>
      <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/QSPI-Interrupt-service-routine-is-not-getting-fired/m-p/181805#M7406</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I am using MCF5282 Evaluation board for development&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I am writing a SPI interrupt based driver for MCF5282 controller&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;&amp;nbsp;&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Functional QSPI Description:-&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;The user initiates QSPI operation by loading a queue of commands in command RAM, writing transmit data into transmit RAM,&lt;/P&gt;&lt;P&gt;and then enabling the QSPI data transfer. The QSPI executes the queued commands and sets the completion flag in the QSPI&lt;/P&gt;&lt;P&gt;interrupt register (QIR[SPIF]) to signal their completion. As another option, QIR[SPIFE] can be enabled to generate an interrupt.&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;&amp;nbsp;&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Our Problem:-&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;&amp;nbsp;&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;It sets on the QSPI finish flag in QIR register once QSPI completes all the commands in the queue&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;but interrupt is not getting fired .I have enabled the SPIFE bit in QIR register ie 1-QSPI interrupt enabled.&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I have done the following changes&amp;nbsp;&lt;/P&gt;&lt;P&gt;1)&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Vectors5282.s File&lt;/P&gt;&lt;P&gt;vector52:&amp;nbsp;&amp;nbsp; .long _QSPI_SPI_TransmitInterrupt /* QSPI Transmit*/&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Interrupt Vector Determination&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;18&amp;nbsp;&amp;nbsp;&amp;nbsp; QSPI&amp;nbsp;&amp;nbsp;&amp;nbsp; Multiple QSPI interrupt&amp;nbsp;&amp;nbsp;&amp;nbsp; See QIR description&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;For INTC0, vector_number = 64 + interrupt source number&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;For QSPI= 64+18 =82 (decimal) 52H(Hex)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;2)&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; QSPI module &amp;nbsp;.c &amp;nbsp;File&lt;/P&gt;&lt;P&gt;#pragma interrupt on&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;void QSPI_TransmitInterrupt(void)&lt;/P&gt;&lt;P&gt;{&lt;/P&gt;&lt;P&gt;}&lt;/P&gt;&lt;P&gt;#pragma interrupt off&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;3)&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; In initialization routine I am doing the below things&lt;/P&gt;&lt;P&gt;A) MCF5282_INTC0_ICR18 = MCF5282_INTC_ICR_IL(4) | MCF5282_INTC_ICR_IP(2 ); // Level and priority&lt;/P&gt;&lt;P&gt;B) MCF5282_INTC0_IMRL &amp;amp;= ~MCF5282_INTC_IMRL_INT18;&amp;nbsp; // Clear mask bit for this interrupt&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Please let me know if i missed any step &amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Regards&lt;/P&gt;&lt;P&gt;Nilesh&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 23 Jul 2012 15:45:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/QSPI-Interrupt-service-routine-is-not-getting-fired/m-p/181805#M7406</guid>
      <dc:creator>nilesh_khunte</dc:creator>
      <dc:date>2012-07-23T15:45:41Z</dc:date>
    </item>
    <item>
      <title>Re: QSPI Interrupt service routine  is not getting fired</title>
      <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/QSPI-Interrupt-service-routine-is-not-getting-fired/m-p/181806#M7407</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&amp;gt; Please let me know if i missed any step&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Nothing onbiously missed.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I'd check the values in all relevant registers with a debugger to make sure all the register definitions are correct. If you don't have a debugger, print the registers out (the relevane interrupt masks, status, ICR and so on).&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Make sure all your ICR registers have UNIQUE IL and IP values. You can't have any ICRs with the same values.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Examine the interrupt table and make sure "vector52" is at the address you expect (0x52 * 4).&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I'd suggest that, with the CPU IPL set to IPL7, do the following in the debugger or write code to do this:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;1 - Print out IPRL0, IPRM0, QIR.&lt;/P&gt;&lt;P&gt;2 - Start the QSPI, and wait for QIR[SPIF] to set.&lt;/P&gt;&lt;P&gt;3 - Check to see if IPRL0[18] has now set.&lt;/P&gt;&lt;P&gt;4 - Check to see that IRLR0 is now showing IRQ4 active.&lt;/P&gt;&lt;P&gt;5 - Read the Global SWIACK and LnIACK registers. Check the vector.&lt;/P&gt;&lt;P&gt;6 - Drop the CPU IPL to zero (or less than 4), the interrupt should trigger.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;You could also use INTFRCL0 to try and force the interrupt from within the controller.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Following the above should find where it isn't working.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Tom&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 23 Jul 2012 21:31:54 GMT</pubDate>
      <guid>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/QSPI-Interrupt-service-routine-is-not-getting-fired/m-p/181806#M7407</guid>
      <dc:creator>TomE</dc:creator>
      <dc:date>2012-07-23T21:31:54Z</dc:date>
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