topic Re: MCF51QE128 I2C Clock Stretching in ColdFire/68K Microcontrollers and Processors https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/MCF51QE128-I2C-Clock-Stretching/m-p/179516#M7260 <HTML><HEAD></HEAD><BODY><P>May be keeping the IIF flag uncleared in the slave ISR keeps the clock held low, and when the interrupt is cleared the clock will be released.</P><P>I am not sure about this but logically this should work fine.</P><P>Please let me know if my understanding is wrong.</P><P>&nbsp;</P><P>Thanks &amp; Regards,</P><P>Chethu&nbsp;</P></BODY></HTML> Wed, 17 Feb 2010 12:48:09 GMT Chethu 2010-02-17T12:48:09Z MCF51QE128 I2C Clock Stretching https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/MCF51QE128-I2C-Clock-Stretching/m-p/179515#M7259 <HTML><HEAD></HEAD><BODY><P>For a particular project, I use an MCF51QE128 working on a board as a IIC slave. I would like to know how to implement "i2c clock stretching". The master I use is built on MCF52233 and I do not want to provide delays here just to get good information from my slave MCF51QE128, I would like this chip to slow down the master instead. Is there any solution to this?</P></BODY></HTML> Fri, 08 May 2009 16:10:21 GMT https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/MCF51QE128-I2C-Clock-Stretching/m-p/179515#M7259 ahoysala 2009-05-08T16:10:21Z Re: MCF51QE128 I2C Clock Stretching https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/MCF51QE128-I2C-Clock-Stretching/m-p/179516#M7260 <HTML><HEAD></HEAD><BODY><P>May be keeping the IIF flag uncleared in the slave ISR keeps the clock held low, and when the interrupt is cleared the clock will be released.</P><P>I am not sure about this but logically this should work fine.</P><P>Please let me know if my understanding is wrong.</P><P>&nbsp;</P><P>Thanks &amp; Regards,</P><P>Chethu&nbsp;</P></BODY></HTML> Wed, 17 Feb 2010 12:48:09 GMT https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/MCF51QE128-I2C-Clock-Stretching/m-p/179516#M7260 Chethu 2010-02-17T12:48:09Z