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    <title>topic Re: MCF52259 - Reading ADC-Modul with DMA-Request (DMA-Timer) in ColdFire/68K Microcontrollers and Processors</title>
    <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/MCF52259-Reading-ADC-Modul-with-DMA-Request-DMA-Timer/m-p/179084#M7207</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I implemented ADC data collection with DMA. The purpose was to reduce noise by averaging. I set up a buffer to collect 128 samples of each channel, a DMA channel and a DMA timer. The DMA timer was configured to trigger at the rate of the ADC or slower. Works great. I didn't encounter any issues with the RDY bits. One funny thing I noticed: for some reason the ADRSLTn registers' addresses are not aligned to a 16-byte boundary, they are off by 2 bytes. This isn't good for DMA since it likes aligned addresses, so some buffer memory is wasted.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 25 Feb 2010 05:37:44 GMT</pubDate>
    <dc:creator>scifi</dc:creator>
    <dc:date>2010-02-25T05:37:44Z</dc:date>
    <item>
      <title>MCF52259 - Reading ADC-Modul with DMA-Request (DMA-Timer)</title>
      <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/MCF52259-Reading-ADC-Modul-with-DMA-Request-DMA-Timer/m-p/179083#M7206</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;i want to read the ADRSLTn-Registers with a DMA-Request. I used an DMA-Timer which request periodically a DMA-Transfer. The problem is that the RDY-Bits in the ADSTAT no be cleared. So i get always the same result. The ADC runs in loop-Mode with fastest speed, so an complete measurement is much faster then the DMA-Timer. Can everyone help me? Thanks.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 24 Feb 2010 23:53:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/MCF52259-Reading-ADC-Modul-with-DMA-Request-DMA-Timer/m-p/179083#M7206</guid>
      <dc:creator>sven_kaemmer</dc:creator>
      <dc:date>2010-02-24T23:53:11Z</dc:date>
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    <item>
      <title>Re: MCF52259 - Reading ADC-Modul with DMA-Request (DMA-Timer)</title>
      <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/MCF52259-Reading-ADC-Modul-with-DMA-Request-DMA-Timer/m-p/179084#M7207</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I implemented ADC data collection with DMA. The purpose was to reduce noise by averaging. I set up a buffer to collect 128 samples of each channel, a DMA channel and a DMA timer. The DMA timer was configured to trigger at the rate of the ADC or slower. Works great. I didn't encounter any issues with the RDY bits. One funny thing I noticed: for some reason the ADRSLTn registers' addresses are not aligned to a 16-byte boundary, they are off by 2 bytes. This isn't good for DMA since it likes aligned addresses, so some buffer memory is wasted.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 25 Feb 2010 05:37:44 GMT</pubDate>
      <guid>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/MCF52259-Reading-ADC-Modul-with-DMA-Request-DMA-Timer/m-p/179084#M7207</guid>
      <dc:creator>scifi</dc:creator>
      <dc:date>2010-02-25T05:37:44Z</dc:date>
    </item>
    <item>
      <title>Re: MCF52259 - Reading ADC-Modul with DMA-Request (DMA-Timer)</title>
      <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/MCF52259-Reading-ADC-Modul-with-DMA-Request-DMA-Timer/m-p/179085#M7208</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Scifi, I think I do it the same way, only the buffer is smaller. I get only a correct value from the ADC when I read the ADC normally between the DMA-Transfers. My intention was also to reduce noise by averaging. Can you post me some parts of your code or correct my code? Many thanks before...&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;MCF_DMA_DMAREQC&lt;/SPAN&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;=&lt;/SPAN&gt; &lt;SPAN&gt;&lt;/SPAN&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;MCF_DMA_DMAREQC_DMAC0&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;4&lt;/SPAN&gt;&lt;SPAN&gt;);&lt;/SPAN&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;&lt;BR /&gt;&amp;nbsp;&lt;/SPAN&gt; &lt;SPAN&gt;MCF_DMA0_SAR&lt;/SPAN&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;=&lt;/SPAN&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;MCF_DMA_SAR_SAR&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;0x40190012&lt;/SPAN&gt;&lt;SPAN&gt;);&lt;/SPAN&gt;&lt;SPAN&gt;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;MCF_DMA0_DAR&lt;/SPAN&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;=&lt;/SPAN&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;MCF_DMA_DAR_DAR&lt;/SPAN&gt;&lt;SPAN&gt;((&lt;/SPAN&gt;&lt;SPAN&gt;uint_32&lt;/SPAN&gt;&lt;SPAN&gt;)&amp;amp;&lt;/SPAN&gt;dma_adc_array&lt;SPAN&gt;[&lt;/SPAN&gt;&lt;SPAN&gt;0&lt;/SPAN&gt;&lt;SPAN&gt;]);&lt;/SPAN&gt;&lt;SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;MCF_DMA0_BCR&lt;/SPAN&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;=&lt;/SPAN&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;MCF_DMA_BCR_BCR&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;16&lt;/SPAN&gt;&lt;SPAN&gt;);&lt;/SPAN&gt;&lt;SPAN&gt;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;MCF_DMA0_DCR&lt;/SPAN&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;=&lt;/SPAN&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;MCF_DMA_DCR_START&lt;/SPAN&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;|&lt;/SPAN&gt;&lt;SPAN&gt;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;MCF_DMA_DCR_DSIZE_BYTE&lt;/SPAN&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;|&lt;/SPAN&gt;&lt;SPAN&gt;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;MCF_DMA_DCR_DINC&lt;/SPAN&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;|&lt;/SPAN&gt;&lt;SPAN&gt;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;MCF_DMA_DCR_SSIZE_BYTE&lt;/SPAN&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;|&lt;/SPAN&gt;&lt;SPAN&gt;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;MCF_DMA_DCR_SINC&lt;/SPAN&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;|&lt;/SPAN&gt;&lt;SPAN&gt;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;MCF_DMA_DCR_EEXT&lt;/SPAN&gt;&lt;SPAN&gt;;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;MCF_DTIM0_DTXMR&lt;/SPAN&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;=&lt;/SPAN&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;MCF_DTIM_DTXMR_DMAEN&lt;/SPAN&gt;&lt;SPAN&gt;;&lt;/SPAN&gt;&lt;SPAN&gt;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;MCF_DTIM0_DTER&lt;/SPAN&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;=&lt;/SPAN&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;MCF_DTIM_DTER_REF&lt;/SPAN&gt;&lt;SPAN&gt;;&lt;/SPAN&gt;&lt;SPAN&gt;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;MCF_DTIM0_DTRR&lt;/SPAN&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;=&lt;/SPAN&gt; &lt;SPAN&gt;&lt;/SPAN&gt;&lt;SPAN&gt;200&lt;/SPAN&gt;&lt;SPAN&gt;;&lt;/SPAN&gt;&lt;SPAN&gt;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;MCF_DTIM0_DTMR&lt;/SPAN&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;=&lt;/SPAN&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;MCF_DTIM_DTMR_RST&lt;/SPAN&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;|&lt;/SPAN&gt;&lt;SPAN&gt;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;MCF_DTIM_DTMR_CLK_DIV1&lt;/SPAN&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;|&lt;/SPAN&gt;&lt;SPAN&gt;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;MCF_DTIM_DTMR_FRR&lt;/SPAN&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;|&lt;/SPAN&gt;&lt;SPAN&gt;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;MCF_DTIM_DTMR_ORRI&lt;/SPAN&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;|&lt;/SPAN&gt;&lt;SPAN&gt;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;MCF_DTIM_DTMR_PS&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;15&lt;/SPAN&gt;&lt;SPAN&gt;);&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 25 Feb 2010 14:44:22 GMT</pubDate>
      <guid>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/MCF52259-Reading-ADC-Modul-with-DMA-Request-DMA-Timer/m-p/179085#M7208</guid>
      <dc:creator>sven_kaemmer</dc:creator>
      <dc:date>2010-02-25T14:44:22Z</dc:date>
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      <title>Re: MCF52259 - Reading ADC-Modul with DMA-Request (DMA-Timer)</title>
      <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/MCF52259-Reading-ADC-Modul-with-DMA-Request-DMA-Timer/m-p/179086#M7209</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;The comments in my code are not in English, so I stripped them before posting:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;PRE&gt;#include "adc.h"#include "config.h"#include "mcf52233regs.h"#include "irq.h"#define ADC_CTRL1       MCF_REG16(0x190000)#define ADC_CTRL2       MCF_REG16(0x190002)#define ADC_POWER       MCF_REG16(0x190052)#define ADC_ADZCSTAT    MCF_REG16(0x190010)#define ADC_RSLT7       MCF_REG16(0x190020)#define CTRL_START      (1 &amp;lt;&amp;lt; 13)#define CTRL_STOP       (1 &amp;lt;&amp;lt; 14)#define CTRL_SIMULT     (1 &amp;lt;&amp;lt; 5)#define POWER_PD0       (1 &amp;lt;&amp;lt; 0)#define POWER_PD1       (1 &amp;lt;&amp;lt; 1)#define POWER_PD2       (1 &amp;lt;&amp;lt; 2)#define POWER_PSTS0     (1 &amp;lt;&amp;lt; 10)#define POWER_PSTS1     (1 &amp;lt;&amp;lt; 11)#define DMA_DMAREQC     MCF_REG32(0x14)#define DMA_SAR0        MCF_REG32(0x100)#define DMA_DAR0        MCF_REG32(0x104)#define DMA_BCR0        MCF_REG32(0x108)#define DMA_DCR0        MCF_REG32(0x10C)#define DMAREQC_DTIM0   4#define DCR_INT         (1u &amp;lt;&amp;lt; 31)#define DCR_EEXT        (1 &amp;lt;&amp;lt; 30)#define DCR_CS          (1 &amp;lt;&amp;lt; 29)#define DCR_AA          (1 &amp;lt;&amp;lt; 28)#define DCR_SINC        (1 &amp;lt;&amp;lt; 22)#define DCR_SSIZE_WORD  (2 &amp;lt;&amp;lt; 20)#define DCR_DINC        (1 &amp;lt;&amp;lt; 19)#define DCR_DSIZE_WORD  (2 &amp;lt;&amp;lt; 17)#define DCR_SMOD_16     (1 &amp;lt;&amp;lt; 12)#define DCR_DMOD_2K     (8 &amp;lt;&amp;lt; 8)#define DCR_D_REQ       (1 &amp;lt;&amp;lt; 7)#define DSR_DONE        (1 &amp;lt;&amp;lt; 24)#define SCM_MPARK       MCF_REG32(0x1C)#define SCM_MPR         MCF_REG8(0x20)#define MPARK_BCM24BIT  (1 &amp;lt;&amp;lt; 24)#define DTIM_PERIOD     40#define DMA_INT_NUM     9#define DMA_INT_VECT    292#define ADC_NCHANNELS   8#define ADC_PORT_MASK   0x3F#define ADC_NSAMPLES    128#define DMA_NBYTES      ((((1&amp;lt;&amp;lt;24) - 1) / sizeof(buffer)) * sizeof(buffer))#define ADC_MODE        3#define ADC_CLK_DIV     2#define DTIM_NUM        0#define DCR_DMOD        DCR_DMOD_2K#pragma ghs section sbss=".adcbuf"static uint16_t buffer[ADC_NSAMPLES][ADC_NCHANNELS];#pragma ghs sectionIRQ_HANDLER_PREFIXvoidadc_dma0_handler(void){        DMA_BCR0 = DSR_DONE;        DMA_BCR0 = DMA_NBYTES;        DMA_DCR0 = DCR_INT | DCR_EEXT | DCR_CS |                   DCR_SINC | DCR_SSIZE_WORD |                   DCR_DINC | DCR_DSIZE_WORD |                   DCR_SMOD_16 | DCR_DMOD_2K | DCR_D_REQ;}#pragma intvect adc_dma0_handler DMA_INT_VECTstatic voidconfig_dma(uint8_t level, uint8_t prio){        SCM_MPR |= (1 &amp;lt;&amp;lt; 2);        SCM_MPARK |= MPARK_BCM24BIT;        DMA_DMAREQC = DMAREQC_DTIM0;        DMA_SAR0 = (uint32_t)&amp;amp;ADC_ADZCSTAT;        DMA_DAR0 = (uint32_t)buffer;        DMA_BCR0 = DMA_NBYTES;        DMA_DCR0  = DCR_INT | DCR_EEXT | DCR_CS |                    DCR_SINC | DCR_SSIZE_WORD |                    DCR_DINC | DCR_DSIZE_WORD |                    DCR_SMOD_16 | DCR_DMOD_2K | DCR_D_REQ;        irq_config(DMA_INT_NUM, level, prio, adc_dma0_handler);        irq_unmask(DMA_INT_NUM);        DTIM_DTXMR(DTIM_NUM) = DTXMR_DMAEN;        DTIM_DTRR(DTIM_NUM)  = DTIM_PERIOD;        DTIM_DTMR(DTIM_NUM)  = DTMR_ORRI | DTMR_FRR |                               DTMR_CLK_DIV1 | DTMR_RST;}voidadc_init(uint8_t level, uint8_t prio){        GPIO_PANPAR = ADC_PORT_MASK;        ADC_CTRL1 = CTRL_STOP | ADC_MODE;        ADC_CTRL2 = CTRL_STOP | CTRL_SIMULT | ADC_CLK_DIV;        ADC_POWER &amp;amp;= ~(POWER_PD0 | POWER_PD1 | POWER_PD2);        while ((ADC_POWER &amp;amp; (POWER_PSTS0 | POWER_PSTS1)) != 0)        {        }        ADC_CTRL1 &amp;amp;= ~CTRL_STOP;        ADC_CTRL1 |= CTRL_START;        config_dma(level, prio);}uint16_tadc_read(uint8_t channel){        if (channel == 7)        {                return ADC_RSLT7;        }        else        {                int32_t sum = 0;                uint8_t i;                for (i = 0; i &amp;lt; ADC_NSAMPLES; i++)                {                        sum += buffer[i][channel + 1];                }                sum /= ADC_NSAMPLES;                return (uint16_t)sum;        }}&lt;/PRE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 29 Oct 2020 09:28:21 GMT</pubDate>
      <guid>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/MCF52259-Reading-ADC-Modul-with-DMA-Request-DMA-Timer/m-p/179086#M7209</guid>
      <dc:creator>scifi</dc:creator>
      <dc:date>2020-10-29T09:28:21Z</dc:date>
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