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    <title>ColdFire/68K Microcontrollers and ProcessorsのトピックRe: 5213 I2C read function</title>
    <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/5213-I2C-read-function/m-p/129192#M657</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;&lt;/DIV&gt;hi,&lt;BR /&gt;&lt;BR /&gt;I did something like this to read or write IIC bus (It works for a ST M41T56):&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN class="msg_source_code"&gt;&lt;SPAN class="text_smallest"&gt;Code:&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;PRE&gt;int rdWrIIc(uint8 *dataPtr, uint8 nBytes, uint8 slaveAddr, uint8 subAddr, uint8 rw){if(MCF_I2C_I2SR&amp;amp;MCF_I2C_I2SR_IBB) /* check if bus busy */{MCF_I2C_I2CR = 0; /* cf doc chap 22.6.1 */MCF_I2C_I2CR = MCF_I2C_I2CR_IEN + MCF_I2C_I2CR_MSTA;MCF_I2C_I2SR = 0; /* STOP condition */MCF_I2C_I2CR = 0;}MCF_I2C_I2CR = MCF_I2C_I2CR_IEN; /* enable IIC module */MCF_I2C_I2CR |= MCF_I2C_I2CR_IIEN; /* enable interrupt module IIC if ISR used */MCF_I2C_I2CR |= MCF_I2C_I2CR_MTX; /* send slave addess after START */MCF_I2C_I2CR |= MCF_I2C_I2CR_MSTA; /* master START condition */MCF_I2C_I2DR = slaveAddr; /* write slave address *//* here you have to wait for end of transfert *//* poll IIC ISR flag for example */MCF_I2C_I2DR = subAddr; /* write sub address *//* here you have to wait for end of transfert *//* poll IIC ISR flag for example */if(rw==IICWRITE) /* write device */{while(nBytes--) /* last byte — */{MCF_I2C_I2DR = *(dataPtr++); /* écriture de la donnée *//* here you have to wait for end of transfert *//* poll IIC ISR flag for example */}}else /*------------------------*/{ /* read device*/MCF_I2C_I2CR |= MCF_I2C_I2CR_RSTA; /* repeated START */MCF_I2C_I2DR = (uint8)(slaveAddr+1);/* Slave address + bit Read *//* here you have to wait for end of transfert *//* poll IIC ISR flag for example */if(nBytes 2) /* 1 byte ==&amp;gt; no ACK */MCF_I2C_I2CR |= MCF_I2C_I2CR_TXAK;MCF_I2C_I2CR &amp;amp;= ~MCF_I2C_I2CR_MTX; /* read mode */MCF_I2C_I2DR; /* dummy read to start */while(nBytes--) /* last byte – */{/* here you have to wait for end of transfert *//* poll IIC ISR flag for example */if(nBytes==1) /* if last but one */MCF_I2C_I2CR |= MCF_I2C_I2CR_TXAK; /* no ACK 4 last read */if(nBytes==0) /* if last byte */MCF_I2C_I2CR = 0; /* STOP condition */*(dataPtr++) = MCF_I2C_I2DR; /* read last */}}MCF_I2C_I2CR = 0; /* STOP condition */}&lt;/PRE&gt;&lt;BR /&gt;&amp;nbsp;&lt;BR /&gt;&lt;BR /&gt;Emmanuel&lt;P&gt;Message Edited by Alban on &lt;SPAN class="date_text"&gt;2006-09-06&lt;/SPAN&gt; &lt;SPAN class="time_text"&gt;02:20 PM&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 05 Sep 2006 22:16:32 GMT</pubDate>
    <dc:creator>Nouchi</dc:creator>
    <dc:date>2006-09-05T22:16:32Z</dc:date>
    <item>
      <title>5213 I2C read function</title>
      <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/5213-I2C-read-function/m-p/129191#M656</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;SPAN&gt;hi everyone,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I am in need of some code to read 7 consecutive bytes from a i2c real time clock. Basically, you first have to send the internal register pointer with a write to the device. then, you can begin reading as many bytes as you want, while the register pointer autoincrements. can you take a look at this code and let me know if this is near right? by the way, the part number for the clock is DS3231. here is the code:&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;uint8[7] readClock()&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;uint8 data[7],i;&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;MCF_I2C_I2CR |= MCF_I2C_I2CR_MTX; ///Tx ready&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;// send start condition&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;MCF_I2C_I2CR |= MCF_I2C_I2CR_MSTA;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;MCF_I2C_I2DR = 0xD0; // devide ID&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;while( !(MCF_I2C_I2SR &amp;amp; MCF_I2C_I2SR_IIF ));&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;MCF_I2C_I2SR &amp;amp;= ~MCF_I2C_I2SR_IIF;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;MCF_I2C_I2DR = reg; // memory address&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;while( !(MCF_I2C_I2SR &amp;amp; MCF_I2C_I2SR_IIF ));&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;MCF_I2C_I2SR &amp;amp;= ~MCF_I2C_I2SR_IIF;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;MCF_I2C_I2CR &amp;amp;= ~MCF_I2C_I2CR_MSTA; //stop!&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;my_pause(100);&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;MCF_I2C_I2CR |= MCF_I2C_I2CR_MTX; ///Tx ready&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;// send start condition&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;MCF_I2C_I2CR |= MCF_I2C_I2CR_MSTA;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;MCF_I2C_I2DR = 0xD1; // device id&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;while( !(MCF_I2C_I2SR &amp;amp; MCF_I2C_I2SR_IIF ));&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;MCF_I2C_I2SR &amp;amp;= ~MCF_I2C_I2SR_IIF;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;MCF_I2C_I2CR &amp;amp;= ~MCF_I2C_I2CR_MTX; // Rx ready&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;// MCF_I2C_I2CR |= MCF_I2C_I2CR_TXAK; // send NO ACK&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;data[0] = MCF_I2C_I2DR; // dummy read of regsiter&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;for(i=0 ; i6 ; i++)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;data[i] = MCF_I2C_I2DR; //start the xfer&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;while( !(MCF_I2C_I2SR &amp;amp; MCF_I2C_I2SR_IIF ));&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;MCF_I2C_I2SR &amp;amp;= ~MCF_I2C_I2SR_IIF;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;data[i] = MCF_I2C_I2DR;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;MCF_I2C_I2CR |= MCF_I2C_I2CR_TXAK;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;data[6] = MCF_I2C_I2DR;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;while( !(MCF_I2C_I2SR &amp;amp; MCF_I2C_I2SR_IIF ));&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;data[6] = MCF_I2C_I2DR;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;MCF_I2C_I2SR &amp;amp;= ~MCF_I2C_I2SR_IIF;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;MCF_I2C_I2CR &amp;amp;= ~MCF_I2C_I2CR_MSTA; //stop!&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;return data;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;i would appreciate any feedback you can give me!&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Thanks,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Trevor&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 05 Sep 2006 10:12:32 GMT</pubDate>
      <guid>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/5213-I2C-read-function/m-p/129191#M656</guid>
      <dc:creator>airswit</dc:creator>
      <dc:date>2006-09-05T10:12:32Z</dc:date>
    </item>
    <item>
      <title>Re: 5213 I2C read function</title>
      <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/5213-I2C-read-function/m-p/129192#M657</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;&lt;/DIV&gt;hi,&lt;BR /&gt;&lt;BR /&gt;I did something like this to read or write IIC bus (It works for a ST M41T56):&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN class="msg_source_code"&gt;&lt;SPAN class="text_smallest"&gt;Code:&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;PRE&gt;int rdWrIIc(uint8 *dataPtr, uint8 nBytes, uint8 slaveAddr, uint8 subAddr, uint8 rw){if(MCF_I2C_I2SR&amp;amp;MCF_I2C_I2SR_IBB) /* check if bus busy */{MCF_I2C_I2CR = 0; /* cf doc chap 22.6.1 */MCF_I2C_I2CR = MCF_I2C_I2CR_IEN + MCF_I2C_I2CR_MSTA;MCF_I2C_I2SR = 0; /* STOP condition */MCF_I2C_I2CR = 0;}MCF_I2C_I2CR = MCF_I2C_I2CR_IEN; /* enable IIC module */MCF_I2C_I2CR |= MCF_I2C_I2CR_IIEN; /* enable interrupt module IIC if ISR used */MCF_I2C_I2CR |= MCF_I2C_I2CR_MTX; /* send slave addess after START */MCF_I2C_I2CR |= MCF_I2C_I2CR_MSTA; /* master START condition */MCF_I2C_I2DR = slaveAddr; /* write slave address *//* here you have to wait for end of transfert *//* poll IIC ISR flag for example */MCF_I2C_I2DR = subAddr; /* write sub address *//* here you have to wait for end of transfert *//* poll IIC ISR flag for example */if(rw==IICWRITE) /* write device */{while(nBytes--) /* last byte — */{MCF_I2C_I2DR = *(dataPtr++); /* écriture de la donnée *//* here you have to wait for end of transfert *//* poll IIC ISR flag for example */}}else /*------------------------*/{ /* read device*/MCF_I2C_I2CR |= MCF_I2C_I2CR_RSTA; /* repeated START */MCF_I2C_I2DR = (uint8)(slaveAddr+1);/* Slave address + bit Read *//* here you have to wait for end of transfert *//* poll IIC ISR flag for example */if(nBytes 2) /* 1 byte ==&amp;gt; no ACK */MCF_I2C_I2CR |= MCF_I2C_I2CR_TXAK;MCF_I2C_I2CR &amp;amp;= ~MCF_I2C_I2CR_MTX; /* read mode */MCF_I2C_I2DR; /* dummy read to start */while(nBytes--) /* last byte – */{/* here you have to wait for end of transfert *//* poll IIC ISR flag for example */if(nBytes==1) /* if last but one */MCF_I2C_I2CR |= MCF_I2C_I2CR_TXAK; /* no ACK 4 last read */if(nBytes==0) /* if last byte */MCF_I2C_I2CR = 0; /* STOP condition */*(dataPtr++) = MCF_I2C_I2DR; /* read last */}}MCF_I2C_I2CR = 0; /* STOP condition */}&lt;/PRE&gt;&lt;BR /&gt;&amp;nbsp;&lt;BR /&gt;&lt;BR /&gt;Emmanuel&lt;P&gt;Message Edited by Alban on &lt;SPAN class="date_text"&gt;2006-09-06&lt;/SPAN&gt; &lt;SPAN class="time_text"&gt;02:20 PM&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 05 Sep 2006 22:16:32 GMT</pubDate>
      <guid>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/5213-I2C-read-function/m-p/129192#M657</guid>
      <dc:creator>Nouchi</dc:creator>
      <dc:date>2006-09-05T22:16:32Z</dc:date>
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