<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>ColdFire/68K Microcontrollers and ProcessorsのトピックRe: Questions about M52233DEMO, flash and IRQ problems</title>
    <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/Questions-about-M52233DEMO-flash-and-IRQ-problems/m-p/129116#M655</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;&lt;/DIV&gt;Hi Volker&lt;BR /&gt;&lt;BR /&gt;If you want to program to FLASH you will have to use the correct linker file (or project). It looks as though the FLASH programmer is trying to FLASH to the RAM range.&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;When using the PIT you also have to activate the interrupt and set up its priorities correctly. The interrupt vector is correct at vector 77&lt;BR /&gt;&lt;BR /&gt;Here is code which will enable programming the PIT accurately to any range from about 1ms to about 70s. It will generate a periodic tick at this rate. It uses a medium interrupt priority which can be changed if required.&lt;BR /&gt;&lt;BR /&gt;Please see also the following post about the uTasker operating system with integrated TCP/IP stack and real-time device simulator.&lt;BR /&gt;&lt;A href="http://forums.freescale.com/freescale/board/message?board.id=CFCOMM&amp;amp;message.id=274" rel="nofollow noopener noreferrer" target="_blank"&gt;http://forums.freescale.com/freescale/board/message?board.id=CFCOMM&amp;amp;message.id=274&lt;/A&gt;&lt;BR /&gt;It is free for educational and hobby use and comes with complete project code and email support. Most peripheral drivers are available so such problems have already been solved you you.&lt;BR /&gt;See for example the Coldfire tutorial containing step for step quide to using the Codewarrior&lt;BR /&gt;&lt;A href="http://www.mjbc.ch/documents/uTasker/M5223X/uTaskerV1.2-Tutorial-M5223X.PDF" rel="nofollow noopener noreferrer" target="_blank"&gt;http://www.mjbc.ch/documents/uTasker/M5223X/uTaskerV1.2-Tutorial-M5223X.PDF&lt;/A&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;Regards&lt;BR /&gt;&lt;BR /&gt;Mark Butcher&lt;BR /&gt;&lt;A href="http://www.mjbc.ch" rel="nofollow noopener noreferrer" target="_blank"&gt;www.mjbc.ch&lt;/A&gt; / &lt;A href="http://www.uTasker.com" rel="nofollow noopener noreferrer" target="_blank"&gt;www.uTasker.com&lt;/A&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN class="msg_source_code"&gt;&lt;SPAN class="text_smallest"&gt;Code:&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;PRE&gt;#define TICK_RESOLUTION 1000 // 1 second TICK// Routine to initialise the Real Time Tick interrupt//#define REQUIRED_MS ((1000/TICK_RESOLUTION)) // The TICK frequency we require in kHz#if TICK_RESOLUTION &amp;gt; 4#if TICK_RESOLUTION &amp;gt; 64#define TICK_DIVIDE (((BUS_CLOCK/2/32768) + REQUIRED_MS/2)/REQUIRED_MS) // the divide ratio required (32k prescaler assumed)#define PIT_PRESCALE PIT_PRESCALE_32K#else#define TICK_DIVIDE (((BUS_CLOCK/2/4096) + REQUIRED_MS/2)/REQUIRED_MS) // the divide ratio required (4k prescaler assumed)#define PIT_PRESCALE PIT_PRESCALE_4K#endif#else#define TICK_DIVIDE (((BUS_CLOCK/2/1048) + REQUIRED_MS/2)/REQUIRED_MS) // the divide ratio required (1k prescaler assumed)#define PIT_PRESCALE PIT_PRESCALE_1K#endifextern void fnStartTick(void){PIT_PCSR_0 = (PIT_PRESCALE | PIT_DBG | PIT_OVW | PIT_PIF | PIT_RLD); // prepare for loadPIT_PMR_0 = TICK_DIVIDE; // load interval valueIC_ICR_0_55 = (INTERRUPT_LEVEL_4 | INTERRUPT_PRIORITY_4); // define interrupts level and priorityIC_IMRH_0 &amp;amp;= ~(PIT_0_PIF_INT_H | MASK_ALL_INT); // unmask interrupt sourcePIT_PCSR_0 = (PIT_PRESCALE | PIT_DBG | PIT_OVW | PIT_PIF | PIT_RLD | PIT_PIE | PIT_EN); // start PIT with interrupt enabled}/**************************** Real Time Clock interrupt ******************************************/__interrupt__ void my_timer_irq_handler(void){PIT_PCSR_0 = (PIT_PRESCALE | PIT_DBG | PIT_OVW | PIT_PIF | PIT_RLD | PIT_PIE | PIT_EN); // Reset interrupt request flag// do other stuff here//////}&lt;/PRE&gt;&lt;BR /&gt;&amp;nbsp;&lt;BR /&gt;&lt;P&gt;Message Edited by Alban on &lt;SPAN class="date_text"&gt;2006-09-06&lt;/SPAN&gt; &lt;SPAN class="time_text"&gt;02:23 PM&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 06 Sep 2006 17:06:01 GMT</pubDate>
    <dc:creator>mjbcswitzerland</dc:creator>
    <dc:date>2006-09-06T17:06:01Z</dc:date>
    <item>
      <title>Questions about M52233DEMO, flash and IRQ problems</title>
      <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/Questions-about-M52233DEMO-flash-and-IRQ-problems/m-p/129115#M654</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt; &lt;/DIV&gt;&lt;SPAN&gt;Hi,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;i tried the web server demo program, coming with the board, and with this demo flashing is possible. But when i make a new project like "Hello world", it runs in debug and run mode, but when flashing i get an error message:&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;0x00001918 bytes of Target Memory at 0x20000500 is not within flash boundaries.&amp;nbsp; &lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I choose the CFM_MCF52233_25MHz.xml File, the Target processor 5223x and the M52235EVB_PnE.cfg file for flashing.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Another problem that i have is, that i am to stupid to implement a working PIT. I try the following code:&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN class="msg_source_code"&gt;&lt;SPAN class="text_smallest"&gt;Code:&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;PRE&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* PIT0 enabled&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; PIT0 timeout period = 1.00 seconds&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Counter wraps to 0xFFFF when it reaches zero&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Writing to PMR replaces value in PIT counter when count reaches 0x0000&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Interrupt when timer expires is enabled&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Timer continues to run in DOZE mode&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Timer continues to run in Debug mode&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; */&amp;nbsp;&amp;nbsp;&amp;nbsp; /*&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; PCSR0[PRE]&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; = %1001&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; PCSR0[DOZE]&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; = 0&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; PCSR0[DBG]&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; = 0&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; PCSR0[OVW]&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; = 0&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; PCSR0[PIE]&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; = 1&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; PCSR0[PIF]&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; = 0&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; PCSR0[RLD]&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; = 0&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; PCSR0[EN]&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; = 1&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; */&amp;nbsp;&amp;nbsp;&amp;nbsp; MCF_PIT0_PCSR = MCF_PIT_PCSR_PRE(0x9) |&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; MCF_PIT_PCSR_PIE&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; |&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; MCF_PIT_PCSR_EN;&amp;nbsp;&amp;nbsp;&amp;nbsp; /*&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; PMR0[PM]&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; = $e5af */&amp;nbsp;&amp;nbsp;&amp;nbsp; MCF_PIT0_PMR = MCF_PIT_PMR_PM(0xe5af);&amp;nbsp;&amp;nbsp;&amp;nbsp; /* PIT1 disabled (PCSR1[EN]=0) */&amp;nbsp;&amp;nbsp;&amp;nbsp; /*&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; PCSR1[PRE]&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; = 0&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; PCSR1[DOZE]&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; = 0&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; PCSR1[DBG]&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; = 0&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; PCSR1[OVW]&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; = 0&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; PCSR1[PIE]&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; = 0&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; PCSR1[PIF]&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; = 0&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; PCSR1[RLD]&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; = 0&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; PCSR1[EN]&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; = 0&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; */&amp;nbsp;&amp;nbsp;&amp;nbsp; MCF_PIT1_PCSR = 0;and change the vector table like this:vector69:&amp;nbsp;&amp;nbsp;&amp;nbsp; .long&amp;nbsp;&amp;nbsp;&amp;nbsp; _my_timer_irq_handler // Source 41: Timer overflowvector6A:&amp;nbsp;&amp;nbsp;&amp;nbsp; .long&amp;nbsp;&amp;nbsp;&amp;nbsp; _irq_handler&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Source 42: Pulse accumulator input vector6B:&amp;nbsp;&amp;nbsp;&amp;nbsp; .long&amp;nbsp;&amp;nbsp;&amp;nbsp; _irq_handler&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Source 43: Pulse accumulator overflowvector6C:&amp;nbsp;&amp;nbsp;&amp;nbsp; .long&amp;nbsp;&amp;nbsp;&amp;nbsp; _my_timer_irq_handler // Source 44: Timer channel 0vector6D:&amp;nbsp;&amp;nbsp;&amp;nbsp; .long&amp;nbsp;&amp;nbsp;&amp;nbsp; _irq_handler&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Source 45: Timer channel 1vector6E:&amp;nbsp;&amp;nbsp;&amp;nbsp; .long&amp;nbsp;&amp;nbsp;&amp;nbsp; _irq_handler&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Source 46: Timer channel 2vector6F:&amp;nbsp;&amp;nbsp;&amp;nbsp; .long&amp;nbsp;&amp;nbsp;&amp;nbsp; _irq_handler&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Source 47: Timer channel 3vector70:&amp;nbsp;&amp;nbsp;&amp;nbsp; .long&amp;nbsp;&amp;nbsp;&amp;nbsp; _irq_handler&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Source 48: LVDvector71:&amp;nbsp;&amp;nbsp;&amp;nbsp; .long&amp;nbsp;&amp;nbsp;&amp;nbsp; _irq_handler&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Source 49: ADCA conversion completevector72:&amp;nbsp;&amp;nbsp;&amp;nbsp; .long&amp;nbsp;&amp;nbsp;&amp;nbsp; _irq_handler&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Source 50: ADCB conversion completevector73:&amp;nbsp;&amp;nbsp;&amp;nbsp; .long&amp;nbsp;&amp;nbsp;&amp;nbsp; _irq_handler&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Source 51: ADC IRQvector74:&amp;nbsp;&amp;nbsp;&amp;nbsp; .long&amp;nbsp;&amp;nbsp;&amp;nbsp; _irq_handler&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Source 52: PWM IRQvector75:&amp;nbsp;&amp;nbsp;&amp;nbsp; .long&amp;nbsp;&amp;nbsp;&amp;nbsp; _irq_handler&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Source 53: RNGA IRQvector76:&amp;nbsp;&amp;nbsp;&amp;nbsp; .long&amp;nbsp;&amp;nbsp;&amp;nbsp; _irq_handler&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Source 54: Reservedvector77:&amp;nbsp;&amp;nbsp;&amp;nbsp; .long&amp;nbsp;&amp;nbsp;&amp;nbsp; _my_timer_irq_handler // Source 55: PIT0 IRQ Flagvector78:&amp;nbsp;&amp;nbsp;&amp;nbsp; .long&amp;nbsp;&amp;nbsp;&amp;nbsp; _irq_handler&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Source 56: PIT1 IRQ Flagvector79:&amp;nbsp;&amp;nbsp;&amp;nbsp; .long&amp;nbsp;&amp;nbsp;&amp;nbsp; _irq_handler&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Source 57: Reserved vector7A:&amp;nbsp;&amp;nbsp;&amp;nbsp; .long&amp;nbsp;&amp;nbsp;&amp;nbsp; _irq_handler&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Source 58: Reservedvector7B:&amp;nbsp;&amp;nbsp;&amp;nbsp; .long&amp;nbsp;&amp;nbsp;&amp;nbsp; _irq_handler&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Source 59: SGFM buffer emptyvector7C:&amp;nbsp;&amp;nbsp;&amp;nbsp; .long&amp;nbsp;&amp;nbsp;&amp;nbsp; _irq_handler&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Source 60: SGFM command completevector7D:&amp;nbsp;&amp;nbsp;&amp;nbsp; .long&amp;nbsp;&amp;nbsp;&amp;nbsp; _irq_handler&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Source 61: Protection violationvector7E:&amp;nbsp;&amp;nbsp;&amp;nbsp; .long&amp;nbsp;&amp;nbsp;&amp;nbsp; _irq_handler&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Source 62: Access errorvector7F:&amp;nbsp;&amp;nbsp;&amp;nbsp; .long&amp;nbsp;&amp;nbsp;&amp;nbsp; _my_timer_irq_handler&amp;nbsp;&amp;nbsp;&amp;nbsp; // Source 63: RTC Interrupt&lt;/PRE&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;But my_timer_irq_handler will never be reached.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Can you explain me how to activate a PIT0-IRQ or make an example available for me?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Many thanks for your help.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Volker&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;DIV&gt; &lt;/DIV&gt;&lt;P&gt;Message Edited by Alban on &lt;SPAN class="date_text"&gt;2006-09-06&lt;/SPAN&gt; &lt;SPAN class="time_text"&gt;02:24 PM&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 04 Sep 2006 12:01:35 GMT</pubDate>
      <guid>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/Questions-about-M52233DEMO-flash-and-IRQ-problems/m-p/129115#M654</guid>
      <dc:creator>vokuit00</dc:creator>
      <dc:date>2006-09-04T12:01:35Z</dc:date>
    </item>
    <item>
      <title>Re: Questions about M52233DEMO, flash and IRQ problems</title>
      <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/Questions-about-M52233DEMO-flash-and-IRQ-problems/m-p/129116#M655</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;&lt;/DIV&gt;Hi Volker&lt;BR /&gt;&lt;BR /&gt;If you want to program to FLASH you will have to use the correct linker file (or project). It looks as though the FLASH programmer is trying to FLASH to the RAM range.&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;When using the PIT you also have to activate the interrupt and set up its priorities correctly. The interrupt vector is correct at vector 77&lt;BR /&gt;&lt;BR /&gt;Here is code which will enable programming the PIT accurately to any range from about 1ms to about 70s. It will generate a periodic tick at this rate. It uses a medium interrupt priority which can be changed if required.&lt;BR /&gt;&lt;BR /&gt;Please see also the following post about the uTasker operating system with integrated TCP/IP stack and real-time device simulator.&lt;BR /&gt;&lt;A href="http://forums.freescale.com/freescale/board/message?board.id=CFCOMM&amp;amp;message.id=274" rel="nofollow noopener noreferrer" target="_blank"&gt;http://forums.freescale.com/freescale/board/message?board.id=CFCOMM&amp;amp;message.id=274&lt;/A&gt;&lt;BR /&gt;It is free for educational and hobby use and comes with complete project code and email support. Most peripheral drivers are available so such problems have already been solved you you.&lt;BR /&gt;See for example the Coldfire tutorial containing step for step quide to using the Codewarrior&lt;BR /&gt;&lt;A href="http://www.mjbc.ch/documents/uTasker/M5223X/uTaskerV1.2-Tutorial-M5223X.PDF" rel="nofollow noopener noreferrer" target="_blank"&gt;http://www.mjbc.ch/documents/uTasker/M5223X/uTaskerV1.2-Tutorial-M5223X.PDF&lt;/A&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;Regards&lt;BR /&gt;&lt;BR /&gt;Mark Butcher&lt;BR /&gt;&lt;A href="http://www.mjbc.ch" rel="nofollow noopener noreferrer" target="_blank"&gt;www.mjbc.ch&lt;/A&gt; / &lt;A href="http://www.uTasker.com" rel="nofollow noopener noreferrer" target="_blank"&gt;www.uTasker.com&lt;/A&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN class="msg_source_code"&gt;&lt;SPAN class="text_smallest"&gt;Code:&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;PRE&gt;#define TICK_RESOLUTION 1000 // 1 second TICK// Routine to initialise the Real Time Tick interrupt//#define REQUIRED_MS ((1000/TICK_RESOLUTION)) // The TICK frequency we require in kHz#if TICK_RESOLUTION &amp;gt; 4#if TICK_RESOLUTION &amp;gt; 64#define TICK_DIVIDE (((BUS_CLOCK/2/32768) + REQUIRED_MS/2)/REQUIRED_MS) // the divide ratio required (32k prescaler assumed)#define PIT_PRESCALE PIT_PRESCALE_32K#else#define TICK_DIVIDE (((BUS_CLOCK/2/4096) + REQUIRED_MS/2)/REQUIRED_MS) // the divide ratio required (4k prescaler assumed)#define PIT_PRESCALE PIT_PRESCALE_4K#endif#else#define TICK_DIVIDE (((BUS_CLOCK/2/1048) + REQUIRED_MS/2)/REQUIRED_MS) // the divide ratio required (1k prescaler assumed)#define PIT_PRESCALE PIT_PRESCALE_1K#endifextern void fnStartTick(void){PIT_PCSR_0 = (PIT_PRESCALE | PIT_DBG | PIT_OVW | PIT_PIF | PIT_RLD); // prepare for loadPIT_PMR_0 = TICK_DIVIDE; // load interval valueIC_ICR_0_55 = (INTERRUPT_LEVEL_4 | INTERRUPT_PRIORITY_4); // define interrupts level and priorityIC_IMRH_0 &amp;amp;= ~(PIT_0_PIF_INT_H | MASK_ALL_INT); // unmask interrupt sourcePIT_PCSR_0 = (PIT_PRESCALE | PIT_DBG | PIT_OVW | PIT_PIF | PIT_RLD | PIT_PIE | PIT_EN); // start PIT with interrupt enabled}/**************************** Real Time Clock interrupt ******************************************/__interrupt__ void my_timer_irq_handler(void){PIT_PCSR_0 = (PIT_PRESCALE | PIT_DBG | PIT_OVW | PIT_PIF | PIT_RLD | PIT_PIE | PIT_EN); // Reset interrupt request flag// do other stuff here//////}&lt;/PRE&gt;&lt;BR /&gt;&amp;nbsp;&lt;BR /&gt;&lt;P&gt;Message Edited by Alban on &lt;SPAN class="date_text"&gt;2006-09-06&lt;/SPAN&gt; &lt;SPAN class="time_text"&gt;02:23 PM&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 06 Sep 2006 17:06:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/Questions-about-M52233DEMO-flash-and-IRQ-problems/m-p/129116#M655</guid>
      <dc:creator>mjbcswitzerland</dc:creator>
      <dc:date>2006-09-06T17:06:01Z</dc:date>
    </item>
  </channel>
</rss>

