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    <title>topic Re: MC51QE128 RAM Function alignment in ColdFire/68K Microcontrollers and Processors</title>
    <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/MC51QE128-RAM-Function-alignment/m-p/159999#M4987</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I know that the 68K processors (from which the ColdFire is derived) required 16-bit alignment on the code. ColdFire has variable-length instructions, but they might require that a function start on an even address. I would check the reference manual for your particular processor as to alignment restrictions on the code.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;---Tom&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 17 Aug 2011 23:59:11 GMT</pubDate>
    <dc:creator>J2MEJediMaster</dc:creator>
    <dc:date>2011-08-17T23:59:11Z</dc:date>
    <item>
      <title>MC51QE128 RAM Function alignment</title>
      <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/MC51QE128-RAM-Function-alignment/m-p/159998#M4986</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I debugged an issue related to a RAM function failing after seemingly unrelated changes caused the starting address of a block of RAM used to hold a function to shift. When the block was aligned to even bytes the function executed flawlessly, but starting at an odd location caused Illegal Address (or Illegal Opcode, I don't remember) resets. My question is why does 16-bit alignment work?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 17 Aug 2011 23:01:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/MC51QE128-RAM-Function-alignment/m-p/159998#M4986</guid>
      <dc:creator>JaseMachine</dc:creator>
      <dc:date>2011-08-17T23:01:10Z</dc:date>
    </item>
    <item>
      <title>Re: MC51QE128 RAM Function alignment</title>
      <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/MC51QE128-RAM-Function-alignment/m-p/159999#M4987</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I know that the 68K processors (from which the ColdFire is derived) required 16-bit alignment on the code. ColdFire has variable-length instructions, but they might require that a function start on an even address. I would check the reference manual for your particular processor as to alignment restrictions on the code.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;---Tom&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 17 Aug 2011 23:59:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/MC51QE128-RAM-Function-alignment/m-p/159999#M4987</guid>
      <dc:creator>J2MEJediMaster</dc:creator>
      <dc:date>2011-08-17T23:59:11Z</dc:date>
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