ColdFire/68K Microcontrollers and ProcessorsのトピックMCF5213 QSPI chip select resetting after each byte

MCF5213 QSPI chip select resetting after each byte

mstone59 — Thu, 25 Oct 2007 04:00:25 GMT

I'm trying to read a serial eeprom, 25LC640.

I'm using a continuous read of eight bytes (plus the 3 bytes, cmd, addr hi, addr lo).

I set the continuous bit(15) of the QCR and the QSPI_CS bits to 0xE for CS0 and the when looking at the scope during a read the CS0 keeps resetting every 8 bits, it's supposed to stay low for 11 bytes. It should go low, then the read cmd is sent, the 16-bit address is sent, then it should stay low for 8 bytes of data. Then CS0 should go high, but it goes hi inbetween every 8-bits, just like the bit 15 in the cmd byte isn't set.

This code works on a 5216 with the same eeprom.

Re: MCF5213 QSPI chip select resetting after each byte

Petter — Thu, 25 Oct 2007 17:20:26 GMT

Did you set the CSIV bit in the QWR correctly?

Re: MCF5213 QSPI chip select resetting after each byte

mstone59 — Wed, 12 Dec 2007 01:26:44 GMT

Thanks for the reply. The problem turned out to be me, I was writing my cmd to the wrong register.

Re: MCF5213 QSPI chip select resetting after each byte

lel_chen — Mon, 07 Sep 2009 15:51:46 GMT

Hi,

I need to perform a read from serial flash. I did a single byte write. After that, I am trying to do a read from the same address location. Opcode+3 address bytes are send first.

Buff[0] = 0x03; /* opcode for read */

Buff[1] = 0x00; /* first address byte*/

Buff[2] = 0x01; /* middle address byte*/

Buff[3] = 0x00; /* last address byte*/

write (fp, Buff, 4);

Then a call to

read (fp, &Buf, 1);

is made.

When I check with oscilloscope, I find that after the opcode +3 address bytes have been send the chip select becomes high and then becomes low for the clock cycle for read. The read command is returning 0x00 always. As per actual requirement, the chip select should continuously remain low until the read is over.

What could be the problem here? The transfer mode is QSPI_TRANSFER_MODE_3. The CSIVbit in QWR is zero. During the write operation, the CS was remaining low throughout.

Thanks,

Chen

Re: MCF5213 QSPI chip select resetting after each byte

lel_chen — Mon, 07 Sep 2009 15:54:24 GMT

Hi,

One more thing to add,

the read () call return 1 - the number of bytes read - which is correct.

But the value read is always 0x00.

Thanks,

Chen

Re: MCF5213 QSPI chip select resetting after each byte

admin — Tue, 08 Sep 2009 20:19:17 GMT

> the chip select should continuously remain low until the read is over.

For the CS remain asserted between the transfers, set CONT bit of each QCR entry to 1.