topic Problems with interrupt handling in ColdFire/68K Microcontrollers and Processors

Problems with interrupt handling

Richmand — Tue, 17 Nov 2009 22:01:03 GMT

Hi. I've got the following problem and I hope anyone can help me.

I want to build up a small CAN network with MCF52235 and therefor I want to use an interrupt controlled message receive, so every successful received message is caught by the ISR.

For the first tests, I enabled the interrupt sources for the flexcan message buffers with interrupt level and priority, set all IMASK bits in flexcan module and put the interrupt handlers in the vector table. But when I start the transmission and the IFLAG bit for successful transmit is set, no interrupt occurs.

In the attached files are the exceptions.c with the vector_table, MCF52235_INTC.h with ISR prototypes and MCF52235.c with interruptcontroller initialization and the ISR functions.

I hope anyone can tell me where I did something wrong.

Best regards

exceptions.c

MCF52235_INTC.c

MCF52235_INTC.h

Message Edited by t.dowe on 2009-11-18 10:57 AM

Re: Problems with interrupt handling

mjbcswitzerland — Thu, 29 Oct 2020 08:59:10 GMT

    MCF_INTC0_IMRH = 0xFFFFFFFF;   /* Masks all interrupts in IMRH */
    MCF_INTC0_IMRL = 0xFFFFFFFE;   /* Masks all interrupts in IMRL */
    MCF_INTC1_IMRH = 0xFFFFFFFF;   /* Masks all interrupts in IMRH */

Check that you are allowing CAN interrupts by 'clearing' the appropriate bits in MCF_INTC1_IMRH.

These are

#define CAN_TX_INTS_L     0x0000ff00                                   // Interrupt controller 1
#define CAN_RX_INTS_L     0x00ff0000                                   // Interrupt controller 1
#define CAN_ERR_INT_L     0x01000000                                   // Interrupt controller 1
#define CAN_BOFF_INT_L    0x02000000                                   // Interrupt controller 1

Regards

Mark

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