ColdFire/68K Microcontrollers and ProcessorsのトピックMCF5235 async /TA

MCF5235 async /TA

RBellet — Wed, 13 Oct 2010 22:03:08 GMT

Hi all.

I'm developing a board using the external bus interface of a MCF5235 to connect with an external device (FPGA).

I plan to use external /TA signal to terminate the bus cycles when the external device is ready.

I have two questions: is it possibile to assert /TA asynchronously with respect to the bus clock ? There may be problems of metastability inside the chip, so /TA must be always synchronous with the bus clock ?

Thank you.

RBellet

Re: MCF5235 async /TA

TomE — Thu, 29 Oct 2020 08:59:08 GMT

Good question.

The Rev 4 MCF5235 Hardware Specification (MCF5235EC.pdf) contains the following:

7.5  External Interface Timing CharacteristicsNOTEAll processor bus timings are synchronous; that is, input setup/hold and output delay with respect to the rising edge of a reference clock. The reference clock is the CLKOUT output.

From my reading you may need to run CLKOUT into the FPGA to synchronise it or run /TA through a separate flip-flop (or two).

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There is a reference in Table 11 in that section to "B2b CLKOUT High to Asynchronous control input /BKPT invalid (3)" which looks like it could give a hint on timing for asynchronous inputs. Timing values "B1b" and "B2b" don't exist anywhere in the document. Note (3) says "Refer to figure A-19", and there's no such figure or even a section "A" in this manual. Looks like a cut-and-paste bug from a different manual.

Asking Google to find references and that Figure:

MCF5271 Hardware Specification has the same reference but no table.

MCF5282 User's Manual has the same reference, has a section A but no Figure A19.

The MC9S08 manuals have Figure A-19, but for SPI timing.

MC6833x manuals have a Figure A-19, but for QSPI timing

Re: MCF5235 async /TA

RBellet — Thu, 14 Oct 2010 20:39:34 GMT

Thank you, TomE, for your reply.

I supposed that, because the external interface is a synchronous bus, the /TA signal must be synchronous with CLKOUT.

But still can not find any explicit explanation in the manuals that prohibits to assert / TA asynchronously, due to metastability problems or other.
I think it depends on whether the signal / TA may or may not be synchronized inside the MCF5235, which I do not know.

I'd like to know what you think about it.

However, to be safe I will connect the CLKOUT signal to the FPGA, and drive signal /TA with a machine synchronous with CLKOUT.

But I still have te doubt that the signal / TA can be controlled asynchronously or not.

Thank you,

RBellet