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    <title>ColdFire/68K Microcontrollers and ProcessorsのトピックRe: Uart receive interrupt</title>
    <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/Uart-receive-interrupt/m-p/149789#M3767</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;You need to read the received character, otherwise the status flag won't get cleared and the interrupt occurs over and over.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Sat, 23 Jul 2011 02:53:37 GMT</pubDate>
    <dc:creator>davezawislak</dc:creator>
    <dc:date>2011-07-23T02:53:37Z</dc:date>
    <item>
      <title>Uart receive interrupt</title>
      <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/Uart-receive-interrupt/m-p/149787#M3765</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I am trying to start a UART interupt if something is in the receive puffer. After the startup the Processor start his work. If i send something about the uart it jumps into a loop in the exceptions.h and the controller becomes very slow. Please could someone tell if their is any mistake in my code ?.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;PRE&gt;static unsigned char *fnSetIntHandler(int iVectNumber, unsigned char *new_handler){&amp;nbsp;&amp;nbsp;&amp;nbsp; extern unsigned long __VECTOR_RAM[];&amp;nbsp;&amp;nbsp;&amp;nbsp; unsigned char *old_handler;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; old_handler = (unsigned char *)__VECTOR_RAM[iVectNumber];&amp;nbsp;&amp;nbsp;&amp;nbsp; __VECTOR_RAM[iVectNumber] = (unsigned long)new_handler;&amp;nbsp;&amp;nbsp;&amp;nbsp; return old_handler;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; }/*&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; enable UART= interrupt&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; */void init_interrupt_controller(void) {&amp;nbsp; MCF_INTC0_ICR13 |= 0x24;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* 111 111 =&amp;gt; IL + IP */&amp;nbsp;&amp;nbsp;&amp;nbsp; MCF_INTC0_IMRL &amp;amp;= ~(MCF_INTC_IMRL_INT_MASK13 + MCF_INTC_IMRL_MASKALL);&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /*(Interrupt level + Interrupt priority)*/ // fnSetIntHandler(UART0_VECTOR, (unsigned char *)_SCI0_Interrupt); // enter the handler routine&amp;nbsp;&amp;nbsp; // MCF5XXX_SR |= (MCF5XXX_SR_IPL_5);&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; MCF_UART0_UIMR |= ( MCF_UART_UIMR_RXRDY_FU);&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; //MCF_UART_UIMR_TXRDY&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // | MCF_UART_UIMR_RXRDY_FU&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; //| MCF_UART_UIMR_DB&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; //| MCF_UART_UIMR_COS);&amp;nbsp;&amp;nbsp;&amp;nbsp; }/*&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; enable interrupts in core's status register&amp;nbsp; */void enable_interrupts (void)&amp;nbsp; {&amp;nbsp; asm {&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; move.l&amp;nbsp;&amp;nbsp; #0x00002000,d0&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; move.w&amp;nbsp;&amp;nbsp; d0,SR&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; }&amp;nbsp;&amp;nbsp;&amp;nbsp; // Unmask appropriate bits in the core’s status register (SR) to enable interrupts&amp;nbsp; // refer to UM Interrupt Sources ch.15.3.6.1&amp;nbsp; } __declspec(interrupt:0) void handler_uart0_int (void){ LED_ON();&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; }

void main (void)
{
fnSetIntHandler(119,(unsigned char*)(*handler_uart0_int));
&amp;nbsp;&amp;nbsp;&amp;nbsp; init_interrupt_controller(); //Mask UART Interrupts
&amp;nbsp;&amp;nbsp;&amp;nbsp; enable_interrupts(); //enable interrupt in core's status register
}&lt;/PRE&gt;&lt;P&gt;&amp;nbsp;Regards&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 29 Oct 2020 08:52:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/Uart-receive-interrupt/m-p/149787#M3765</guid>
      <dc:creator>PEGE</dc:creator>
      <dc:date>2020-10-29T08:52:01Z</dc:date>
    </item>
    <item>
      <title>Re: Uart receive interrupt</title>
      <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/Uart-receive-interrupt/m-p/149788#M3766</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Since you are not acking the interrupt, I would imagine that the processor is calling the handler over and over.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 14 Jul 2011 20:47:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/Uart-receive-interrupt/m-p/149788#M3766</guid>
      <dc:creator>JimDon</dc:creator>
      <dc:date>2011-07-14T20:47:48Z</dc:date>
    </item>
    <item>
      <title>Re: Uart receive interrupt</title>
      <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/Uart-receive-interrupt/m-p/149789#M3767</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;You need to read the received character, otherwise the status flag won't get cleared and the interrupt occurs over and over.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sat, 23 Jul 2011 02:53:37 GMT</pubDate>
      <guid>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/Uart-receive-interrupt/m-p/149789#M3767</guid>
      <dc:creator>davezawislak</dc:creator>
      <dc:date>2011-07-23T02:53:37Z</dc:date>
    </item>
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