ColdFire/68K Microcontrollers and ProcessorsのトピックRe: Processor Status Register

Processor Status Register

PEGE — Wed, 13 Jul 2011 18:12:44 GMT

Hello iam working with a MCF5282 and at the moment i am searching the adress of the Proseccor Status Registers (SR). I found the makros but no pointer to the momory.

Does any one know the answer for my problem.

regards Peter

Re: Processor Status Register

scifi — Wed, 13 Jul 2011 21:57:28 GMT

If I am not mistaken, the processor status register does not lie in the normal address space. It is accessed with special CPU instructions.

Re: Processor Status Register

TomE — Thu, 14 Jul 2011 08:24:16 GMT

Read "1.5 Supervisor Programming Model" in "cfprm.pdf" from here:

http://cache.freescale.com/files/dsp/doc/ref_manual/CFPRM.pdf

Chapter 8 for the "Move from Status Register" and "Move to Status Register" instructions.

The CPU registers are read by special instructions. The peripheral control registers are memory mapped. There's a big difference between the CPU Core and its peripherals.

Tom

Re: Processor Status Register

PEGE — Thu, 14 Jul 2011 13:22:05 GMT

Thanks a lot for your help and the link.

I've realized as follows

asm {
             move.l   #0x00002000,d0
             move.w   d0,SR
         }

regards

Re: Processor Status Register

TomE — Thu, 29 Oct 2020 08:51:13 GMT

You should be using the MACROS provided by your development system for this purpose.

We're using standard headers with our GCC-based build environment. If you're using something else, check what they're using.

For instance this is what we use:

* Functions provided by mcf5xxx.s

uint32_t asm_set_ipl(uint32_t);

void mcf5xxx_wr_cacr(uint32_t);

void mcf5xxx_wr_acr0(uint32_t);

void mcf5xxx_wr_acr1(uint32_t);

void mcf5xxx_wr_acr2(uint32_t);

void mcf5xxx_wr_acr3(uint32_t);

void mcf5xxx_wr_other_a7(uint32_t);

void mcf5xxx_wr_other_sp(uint32_t);

void mcf5xxx_wr_vbr(uint32_t);

void mcf5xxx_wr_macsr(uint32_t);

void mcf5xxx_wr_mask(uint32_t);

void mcf5xxx_wr_acc0(uint32_t);

void mcf5xxx_wr_accext01(uint32_t);

void mcf5xxx_wr_accext23(uint32_t);

void mcf5xxx_wr_acc1(uint32_t);

void mcf5xxx_wr_acc2(uint32_t);

void mcf5xxx_wr_acc3(uint32_t);

void mcf5xxx_wr_sr(uint32_t);

void mcf5xxx_wr_rambar0(uint32_t);

void mcf5xxx_wr_rambar1(uint32_t);

void mcf5xxx_wr_mbar(uint32_t);

void mcf5xxx_wr_mbar0(uint32_t);

void mcf5xxx_wr_mbar1(uint32_t);

If you want to write directly to the status register, use "mcf5xxx_wr_sr(MCF5XXX_SR_S)".

If you always consistently use these functions to write to these registers, then a simple search will find all the places in your code where you are writing to these registers. If you scatter "asm" statements around and aren't consistent in the formatting it makes it a lot harder to check and reverse-engineer the code when needed.

if you want to change the CPU Interrupt Priority Level (which after initialisation is the only thing you should be changing in the SR) then use "asm_set_ipl()" instead.And you should always use this like:

    /* Disable interrupts */
    uint16_t old_ipl = asm_set_ipl( 7 );

    /* Do whatever needed protecting... */

    /* Restore interrupts */
    asm_set_ipl(old_ipl);

The reason for the "save and restore" is that the above code can be called from routines that have already disabled interrupts. This is a far better practice that using simple "disable" and "enable" calls.

Tom