topic Re: DMA with 5472 - performace in ColdFire/68K Microcontrollers and Processors

DMA with 5472 - performace

martinw — Thu, 13 Sep 2007 22:59:59 GMT

Hi,

I'm using dma on a 5472 to transfer data from memory to memory, using single buffer dma.

I want to know what performance I can expect doing this. I seem to get around 590nS per long transfer.

CPU clock input is 50MHz, flexbus is 50MHz, internal bus 100MHz, core is 200MHz.

I've tried sram to sram, both on flexbus - 16 bits wide, each 16 bit transfer was around 580nS.

I've tried SDRAM to graphics memory on the flexbus, 32 bits wide, each transfer again around 590nS.

Is this the best I can expect? I was hoping for much faster.

Is there anything I can do to improve performance? Is it possible to modify the bus arbitration so that the dma controller gets more bandwidth?

Cheers

MartinW

Re: DMA with 5472 - performace

JWW — Fri, 14 Sep 2007 10:26:24 GMT

MartinW,

Can you give us some additional details on your test setup. My first guess, without seeing a lot of detail is that you have the waitstates on the FlexBus set too high. The FlexBus can be a fast bus, if configured correctly, but also can be very slow if you are not careful.

If the only thing going on in the system is a DMA copy, then this number seems really large. Even if you have other things going on, this seems a bit large.

How are you configuring the DMA?

-JWW

Re: DMA with 5472 - performace

martinw — Fri, 14 Sep 2007 14:03:49 GMT

Hi JWW,

When doing the 16 bit sram to sram copy, I was looking at the read and write lines using a logic analyser - both read and write pulses were around 60nS, but there was a huge gap between the write and the next read.

My dma test function does a call to StartDMA, then sits and reads the dma status until it is 'done'.

I'll get the setup information together and post it here later this morning.

Thanks for your help

Cheers

Martin W

Re: DMA with 5472 - performace

martinw — Fri, 14 Sep 2007 15:39:22 GMT

Hi JWW,

I've attached some c code showing the chip select initialisation for the sram, and the dma calls used.

I've also attached a diagram of the signals measure on the actual sram device.

Please let me know if you need any more information.

Regards

Martin W

Message Edited by martinw on 2007-09-14 09:39 AM