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    <title>topic MCF5271 runnig from SDRAM in ColdFire/68K Microcontrollers and Processors</title>
    <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/MCF5271-runnig-from-SDRAM/m-p/143861#M2784</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;SPAN&gt;Hello,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;I have a custom board with the MCF5271 and Micron MT48LC4M32B2 SDRAM chip.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;The memory test is working fine, i am able to read and write the whole memory, but when i try to run code from the SDRAM WITH cache enabled the program freeze after reaching the code above the first 1MB. With disabled cache it is executing code properly.&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 29 Jan 2007 20:21:08 GMT</pubDate>
    <dc:creator>CM601</dc:creator>
    <dc:date>2007-01-29T20:21:08Z</dc:date>
    <item>
      <title>MCF5271 runnig from SDRAM</title>
      <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/MCF5271-runnig-from-SDRAM/m-p/143861#M2784</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;SPAN&gt;Hello,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;I have a custom board with the MCF5271 and Micron MT48LC4M32B2 SDRAM chip.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;The memory test is working fine, i am able to read and write the whole memory, but when i try to run code from the SDRAM WITH cache enabled the program freeze after reaching the code above the first 1MB. With disabled cache it is executing code properly.&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 29 Jan 2007 20:21:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/MCF5271-runnig-from-SDRAM/m-p/143861#M2784</guid>
      <dc:creator>CM601</dc:creator>
      <dc:date>2007-01-29T20:21:08Z</dc:date>
    </item>
    <item>
      <title>Re: MCF5271 runnig from SDRAM</title>
      <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/MCF5271-runnig-from-SDRAM/m-p/143862#M2785</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;Hi,&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Search for the thread "&lt;A href="http://forums.freescale.com/freescale/board/message?board.id=CFCOMM&amp;amp;message.id=923" target="_blank"&gt;&lt;FONT color="#51626F"&gt;SDRAM configuration help&lt;/FONT&gt;&lt;/A&gt;"&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;I had problems on my board that may be from the same misconfiguration.&amp;nbsp; In my case, all was well until I did a movem.l instruction, popping many registers off the stack.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;The punchline was that I had configured the RAM for CAS2 and the CPU for CAS3 (or something like that); essentially because the table headers describing the SDRAM controller were confusing.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;So... all worked well until the CPU and RAM got a chance to burst some data, then it screwed all up.&amp;nbsp; Sounds similar to what you're describing.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Good luck!&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 09 Feb 2007 04:13:52 GMT</pubDate>
      <guid>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/MCF5271-runnig-from-SDRAM/m-p/143862#M2785</guid>
      <dc:creator>ynaught</dc:creator>
      <dc:date>2007-02-09T04:13:52Z</dc:date>
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