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    <title>topic Re: compiler making illegal opcodes in ColdFire/68K Microcontrollers and Processors</title>
    <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/compiler-making-illegal-opcodes/m-p/139295#M2161</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;The whole disassembly listing looks like garbage. As well as the illegal opcodes, even the bytes which disassemble to instructions don't look sensible. For example,&lt;BR /&gt;&lt;BR /&gt;moveq #111,d2&lt;BR /&gt;moveq #32,d2&lt;BR /&gt;ble.s 0x20002E4E&lt;BR /&gt;&lt;BR /&gt;This would load 111 into the D2 register, immediately throw that away and then load 32 into D2. Finally, the 'Branch on Less than or Equal (BLE)' would never be taken, since 32 is not less than or equal to 0 - in other words, this code makes no sense.&lt;BR /&gt;&lt;BR /&gt;In conclusion, I doubt that that's compiler generated code. It looks as though you are trying to execute data. Perhaps the program is slowly being corrupted during execution?&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 07 Dec 2006 17:52:04 GMT</pubDate>
    <dc:creator>SimonMarsden_de</dc:creator>
    <dc:date>2006-12-07T17:52:04Z</dc:date>
    <item>
      <title>compiler making illegal opcodes</title>
      <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/compiler-making-illegal-opcodes/m-p/139293#M2159</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;SPAN&gt;Heres some debug listing, it has invalid opcodes neatly commented. How can this happen? I must be doing something incorrectly. Below that is my source file. When I run the program, ADC always reads 0 and it crashes after a while. Sorry about tabs being lost in the paste, they only ever go 1 level deep.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Thanks,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;J JORDAN&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;20002DD6: 0A004572 eori.b #0x72,d0&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;20002DDA: 726F moveq #111,d1&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;20002DDC: 7220 moveq #32,d1&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;20002DDE: 6F6E ble.s 0x20002E4E (0x20002e4e) ; 0x20002e4e&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;20002DE0: 206F7065 movea.l 28773(a7),a0&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;20002DE4: 7261 moveq #97,d1&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;20002DE6: 6E64 bgt.s 0x20002E4C (0x20002e4c) ; 0x20002e4c&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;20002DE8: 20726561640A movea.l ([25610,a2]),a0&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;20002DEE: 00005265 ori.b #0x65,d0&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;20002DF2: 7365 dc.w 0x7365 ; Invalid opcode&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;20002DF4: 7276 moveq #118,d1&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;20002DF6: 6564 bcs.s 0x20002E5C (0x20002e5c) ; 0x20002e5c&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;20002DF8: 2046 movea.l d6,a0&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;20002DFA: 6175 bsr.s 0x20002E71 (0x20002e71) ; 0x20002e71&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;20002DFC: 6C74 bge.s 0x20002E72 (0x20002e72) ; 0x20002e72&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;20002DFE: 2053 movea.l (a3),a0&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;20002E00: 7461 moveq #97,d2&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;20002E02: 7475 moveq #117,d2&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;20002E04: 7320 dc.w 0x7320 ; Invalid opcode&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;20002E06: 456E dc.w 0x456e ; Invalid opcode&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;20002E08: 636F bls.s 0x20002E79 (0x20002e79) ; 0x20002e79&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;20002E0A: 6469 bcc.s 0x20002E75 (0x20002e75) ; 0x20002e75&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;#include "common.h"&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;#include "mcf5xxx.h"&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;#include&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;#include "low_level.h"&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;__interrupt__ void pit0_irq(void)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;{//vector 64+55=119, source =55&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;//take a read from the ADC&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;unsigned int adc_result; //store adc result here&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;PIT0_PMR = 0x6000; //reset flag&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;ADC_CTRL1 |= (113); //start conversion&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;adc_result = (ADC_ADRSLT0&amp;gt;&amp;gt;3); //read result register&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;printf("%d\n\r", adc_result);&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;fflush(stdout);&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;int main()&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;GPIO_DDRTC = 0xff; //init output port&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;GPIO_PORTTC = 0x00; //init port pins&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;mcf5xxx_set_handler(64 + 55, pit0_irq); //init irq&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;//PWM module setup, outputs 1, 3, 5, 7&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;GPIO_PTDPAR = 0x0f; //pwm outputs on port td&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;PWM_PWMPOL = 0xaa; //pulses high&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;PWM_PWMCTL = 0xf0; //concatenate all 4 channels to 16bit&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;PWM_PWMDTY01 = 0x0010;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;PWM_PWMPER01 = 0xffff;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;PWM_PWMDTY23 = 0x1000;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;PWM_PWMPER23 = 0xffff;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;PWM_PWMDTY45 = 0x1000;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;PWM_PWMPER45 = 0xffff;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;PWM_PWMDTY67 = 0x1000;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;PWM_PWMPER67 = 0xffff;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;PWM_PWMSCLA = PWM_PWMSCLB = 8;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;PWM_PWMCLK = 0xaa; //select scaled clocks&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;PWM_PWME = 0xaa; //enable all channels&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;//PIT module setup&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;PIT0_PCSR = PIT_PCSR_PRE(13)|PIT_PCSR_PIE|&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;PIT_PCSR_RLD|PIT_PCSR_EN;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;PIT0_PMR = 0x6000;&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;//configure analog to digital converter&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;ADC_CTRL2 = 3; //clock div assuming fast clock&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;ADC_ADSDIS = (11); //stop at AN1, only perform sample0 with AN0&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;ADC_POWER &amp;amp;= ~(0x0001); //power up adc A&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;GPIO_PANPAR = 1; //setup AN0 to primary pin function&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;INTC_ICR55 = 0 | INTC_ICR_IP(6) | INTC_ICR_IL(6);&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;//set priorities for pit0 irq55&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;INTC_IMRH &amp;amp;= ~INTC_IMRH_MASK55;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;//unmask that specific interrupt&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;mcf5xxx_irq_enable();&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;while(1)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 07 Dec 2006 14:05:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/compiler-making-illegal-opcodes/m-p/139293#M2159</guid>
      <dc:creator>josh_outerspace</dc:creator>
      <dc:date>2006-12-07T14:05:15Z</dc:date>
    </item>
    <item>
      <title>Re: compiler making illegal opcodes</title>
      <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/compiler-making-illegal-opcodes/m-p/139294#M2160</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;Hi J Jordan,&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;See here regarding tab problem:&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;A href="http://forums.freescale.com/freescale/board/message?board.id=FORUMUSE&amp;amp;message.id=294" target="_blank"&gt;http://forums.freescale.com/freescale/board/message?board.id=FORUMUSE&amp;amp;message.id=294&lt;/A&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Regards&lt;/DIV&gt;&lt;DIV&gt;Peg&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 07 Dec 2006 15:28:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/compiler-making-illegal-opcodes/m-p/139294#M2160</guid>
      <dc:creator>peg</dc:creator>
      <dc:date>2006-12-07T15:28:00Z</dc:date>
    </item>
    <item>
      <title>Re: compiler making illegal opcodes</title>
      <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/compiler-making-illegal-opcodes/m-p/139295#M2161</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;The whole disassembly listing looks like garbage. As well as the illegal opcodes, even the bytes which disassemble to instructions don't look sensible. For example,&lt;BR /&gt;&lt;BR /&gt;moveq #111,d2&lt;BR /&gt;moveq #32,d2&lt;BR /&gt;ble.s 0x20002E4E&lt;BR /&gt;&lt;BR /&gt;This would load 111 into the D2 register, immediately throw that away and then load 32 into D2. Finally, the 'Branch on Less than or Equal (BLE)' would never be taken, since 32 is not less than or equal to 0 - in other words, this code makes no sense.&lt;BR /&gt;&lt;BR /&gt;In conclusion, I doubt that that's compiler generated code. It looks as though you are trying to execute data. Perhaps the program is slowly being corrupted during execution?&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 07 Dec 2006 17:52:04 GMT</pubDate>
      <guid>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/compiler-making-illegal-opcodes/m-p/139295#M2161</guid>
      <dc:creator>SimonMarsden_de</dc:creator>
      <dc:date>2006-12-07T17:52:04Z</dc:date>
    </item>
    <item>
      <title>Re: compiler making illegal opcodes</title>
      <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/compiler-making-illegal-opcodes/m-p/139296#M2162</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;Maybe it was the result of trying to treat the 8 bit pwm registers as 16 bit, I hacked up the header file, see the third line is my own invention. Is my goal of treating the two registers together as a 16 bit register possible? Also what Ive done is take away all the MCF_ from all the defines.&lt;BR /&gt;&lt;BR /&gt;&lt;PRE&gt;
#define PWM_PWMDTY0 (*(vuint8 *)(&amp;amp;__IPSBAR[0x1B001C]))
#define PWM_PWMDTY1 (*(vuint8 *)(&amp;amp;__IPSBAR[0x1B001D]))
#define PWM_PWMDTY01 (*(vuint16 *)(&amp;amp;__IPSBAR[0x1B001C]))
&lt;/PRE&gt;&lt;BR /&gt;&lt;BR /&gt;The illegal opcodes and crashing seems to go away when my modifications are removed, but the ADC still reads zero always.&lt;P&gt;Message Edited by J JORDAN on &lt;SPAN class="date_text"&gt;2006-12-07&lt;/SPAN&gt;&lt;SPAN class="time_text"&gt;03:16 PM&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 07 Dec 2006 23:04:59 GMT</pubDate>
      <guid>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/compiler-making-illegal-opcodes/m-p/139296#M2162</guid>
      <dc:creator>josh_outerspace</dc:creator>
      <dc:date>2006-12-07T23:04:59Z</dc:date>
    </item>
    <item>
      <title>Re: compiler making illegal opcodes</title>
      <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/compiler-making-illegal-opcodes/m-p/139297#M2163</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;As already mentioned, the decoded area does not contain code, but it is not corrupted either.&lt;BR /&gt;Instead it just contains some strings, the first few bytes (45 72 ....) read as&lt;BR /&gt;"Error on operand". It contains string literals for error handling.&lt;BR /&gt;&lt;BR /&gt;Daniel&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 08 Dec 2006 05:58:33 GMT</pubDate>
      <guid>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/compiler-making-illegal-opcodes/m-p/139297#M2163</guid>
      <dc:creator>CompilerGuru</dc:creator>
      <dc:date>2006-12-08T05:58:33Z</dc:date>
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