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    <title>topic Re: writing to SDRAM problem in ColdFire/68K Microcontrollers and Processors</title>
    <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/writing-to-SDRAM-problem/m-p/136590#M1818</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Mun Lai&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I'm facing the same problem as yours. When I write to one location, the location offset by 200 hex also be updated.&amp;nbsp;&lt;/P&gt;&lt;P&gt;for example, write to 0x40000000 with value 12 causes the location 0x40000200 updated with 12&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;You have mentioned you have the wiring problem, can you tell me which wrong wires cause that problem ?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thank you.&lt;/P&gt;&lt;P&gt;Edison.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 07 May 2009 04:18:15 GMT</pubDate>
    <dc:creator>Edison_Tran</dc:creator>
    <dc:date>2009-05-07T04:18:15Z</dc:date>
    <item>
      <title>writing to SDRAM problem</title>
      <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/writing-to-SDRAM-problem/m-p/136585#M1813</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt; &lt;/DIV&gt;&lt;DIV&gt;&lt;DIV&gt;Hi,&lt;BR /&gt;we have a board with MCF5235 coldfire connected to a&lt;BR /&gt;128Mbit Sdram (ELPIDA EDS1216AGTA 8M words x 16 bit) chip. It is connected with the&lt;BR /&gt;following configurations:&lt;/DIV&gt;&lt;DIV&gt;16-bit Port,9-Column Address&lt;BR /&gt;MCF5235 Pin - A16 A15 A14 A13 A12 A11 A10 A9&amp;nbsp; A18 A19 A20 A21&amp;nbsp; A22&amp;nbsp; A23&lt;BR /&gt;SDRAM Pin&amp;nbsp;&amp;nbsp; - A0&amp;nbsp;&amp;nbsp;&amp;nbsp; A1&amp;nbsp;&amp;nbsp; A2&amp;nbsp;&amp;nbsp; A3&amp;nbsp;&amp;nbsp; A4&amp;nbsp;&amp;nbsp; A5&amp;nbsp;&amp;nbsp; A6&amp;nbsp;&amp;nbsp; A7&amp;nbsp; A8&amp;nbsp;&amp;nbsp; A9&amp;nbsp;&amp;nbsp; A10 A11&amp;nbsp; BA0&amp;nbsp; BA1&lt;/DIV&gt;&lt;DIV&gt;where BA0,BA1 are the Bank Select Addresses&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;We&amp;nbsp;currently face a problem&amp;nbsp;when&amp;nbsp;reading and writing to SDRAM using the&amp;nbsp; Pemicro ICDCFZ_PRO BDM debugger.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;We have configured the SDRAM memory space to start from 0x10000000 to 0x10FFFFFF.&lt;/DIV&gt;&lt;DIV&gt;We have no problem reading and writing to the first half of that memory space (0x10000000 to 0x107fffff).&lt;/DIV&gt;&lt;DIV&gt;But when we try to write to to the 2nd half of that memory space(0x10800000 to 0x10ffffff), this is what happened:&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;when we write a byte to 0x10800000, another location 0x10800008 gets written with the same value.&lt;/DIV&gt;&lt;DIV&gt;&lt;DIV&gt;&amp;nbsp;when we write a byte to 0x10800001, another location 0x10800009 gets written with the same value.&lt;/DIV&gt;&lt;DIV&gt;&lt;DIV&gt;&amp;nbsp;when we write a byte to 0x10800002, another location 0x1080000A gets written with the same value.&lt;/DIV&gt;&lt;DIV&gt;&lt;DIV&gt;&amp;nbsp;when we write a byte to 0x10800003, another location 0x1080000B gets written with the same value.&lt;/DIV&gt;&lt;DIV&gt;&lt;DIV&gt;&amp;nbsp;when we write a byte to 0x10800004, another location 0x1080000C gets written with the same value.&lt;/DIV&gt;&lt;DIV&gt;&lt;DIV&gt;&amp;nbsp;when we write a byte to 0x10800005, another location 0x1080000D gets written with the same value.&lt;/DIV&gt;&lt;DIV&gt;&lt;DIV&gt;&amp;nbsp;when we write a byte to 0x10800006, another location 0x1080000E gets written with the same value.&lt;/DIV&gt;&lt;DIV&gt;&lt;DIV&gt;&amp;nbsp;when we write a byte to 0x10800007, another location 0x1080000F gets written with the same value.&lt;/DIV&gt;&lt;DIV&gt;&lt;DIV&gt;&amp;nbsp;when we write a byte to 0x10800008, another location 0x10800000 gets written with the same value.&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;DIV&gt;&amp;nbsp;when we write a byte to 0x10800009, another location 0x10800001 gets written with the same value.&lt;/DIV&gt;&lt;DIV&gt;when we write a byte to 0x1080000A, another location 0x10800002 gets written with the same value.&lt;/DIV&gt;&lt;DIV&gt;when we write a byte to 0x1080000B, another location 0x10800003 gets written with the same value.&lt;/DIV&gt;&lt;DIV&gt;when we write a byte to 0x1080000C, another location 0x10800004 gets written with the same value.&lt;/DIV&gt;&lt;DIV&gt;when we write a byte to 0x1080000D, another location 0x10800005 gets written with the same value.&lt;/DIV&gt;&lt;DIV&gt;when we write a byte to 0x1080000E, another location 0x10800006 gets written with the same value.&lt;/DIV&gt;&lt;DIV&gt;when we write a byte to 0x1080000F, another location 0x10800007 gets written with the same value.&lt;/DIV&gt;&lt;DIV&gt;when we write a byte to 0x10800010, another location 0x10800018 gets written with the same value.&lt;/DIV&gt;&lt;DIV&gt;....... and so on.......&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;This problem seems to appear only on the 2nd half of the SDRAM memory space. We are puzzled as to what could have caused it to behave this way. Hope someone could give us some answers.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Thanks in advance!&lt;/DIV&gt;&lt;DIV&gt;Mun Lai&lt;/DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 14 Nov 2006 22:30:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/writing-to-SDRAM-problem/m-p/136585#M1813</guid>
      <dc:creator>wmunlai</dc:creator>
      <dc:date>2006-11-14T22:30:11Z</dc:date>
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    <item>
      <title>Re: writing to SDRAM problem</title>
      <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/writing-to-SDRAM-problem/m-p/136586#M1814</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;Hi,&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;We are still unable to solve the problem. We have tried everything we can think of. If register settings are wrong, why does it affect only the&amp;nbsp;2nd half of SDRAM memory space?&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Hope someone can advise us.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;here is a script we have used :&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;;;;;;;;;Clock module Chapter 7&lt;BR /&gt;;Crystal Frequency = 13.56MHz&lt;BR /&gt;;Sets the Core Frequency = 10 * 13.56MHz =135.6MHz&lt;BR /&gt;;Internal Bus Frequency = 75MHz&lt;BR /&gt;MM.L 0x40120000 0x03000000&lt;BR /&gt;DELAY 100&lt;/DIV&gt;&lt;DIV&gt;;;;;;;;;GPIO module Chapter 12&lt;BR /&gt;;A[23:21] pin configured for address bit 23-21&lt;BR /&gt;;D[15:0] pins configured for data 15-0 functions&lt;BR /&gt;MM.B 0x40100040 0xE0&lt;/DIV&gt;&lt;DIV&gt;;Only CS1 pin is configured for CS function&lt;BR /&gt;;The rest of CS pins are used for GPIO functions&lt;BR /&gt;MM.B 0x40100045 0x02&lt;/DIV&gt;&lt;DIV&gt;;SD_WE pin configured for SDRAMC WE function&lt;BR /&gt;;SD_CAS pin configured for SDRAMC CAS function&lt;BR /&gt;;SD_SRAS pin configured for SDRAMC SRAS function&lt;BR /&gt;;SD_CKE pin configured for SDRAMC CKE function&lt;BR /&gt;;SD_CS pin configured for SDRAMC CS function&lt;BR /&gt;;CS2 abd CS3 are NOT configured for SDRAMC function&lt;BR /&gt;MM.B 0x40100046 0x3F&amp;nbsp;&lt;BR /&gt;&amp;nbsp;&lt;BR /&gt;;;;;;;;;;; SDRAM module Chapter 18&lt;BR /&gt;;Refresh Timing = 6 clocks&lt;BR /&gt;;Refresh Count = 0x42&lt;BR /&gt;MM.W 0x40000040 0x0242&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;;set RAM base address to 0x10000000&lt;BR /&gt;;CBM set to 3&lt;BR /&gt;;CASL set to bit value 01&lt;BR /&gt;;set Port Size 32 bit&lt;BR /&gt;MM.L 0x40000048 0x10001320&lt;/DIV&gt;&lt;DIV&gt;;set RAM base address mask to allow for 16M range&lt;BR /&gt;;set bit V to initialize registers controlling DRAM block&lt;BR /&gt;MM.L 0x4000004C 0x00fc0001&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;;set IP bit to initiate Precharge All command&lt;BR /&gt;MM.L 0x40000048 0x10001328&lt;BR /&gt;;DELAY 10&lt;/DIV&gt;&lt;DIV&gt;&lt;BR /&gt;; Write to SDRAM to initiate precharge&lt;BR /&gt;MM.w 0x10800000 0xA596&lt;/DIV&gt;&lt;DIV&gt;; Turn On Refresh Enable bit&lt;BR /&gt;MM.L 0x40000048 0x10009328&lt;BR /&gt;;DELAY 1&lt;/DIV&gt;&lt;DIV&gt;;Initiate Mode Register Set command&lt;BR /&gt;MM.L 0x40000048 0x10009368&lt;/DIV&gt;&lt;DIV&gt;;Write to the SDRAM Mode Register&lt;BR /&gt;MM.W 0x10800200 0xA596&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 17 Nov 2006 23:17:14 GMT</pubDate>
      <guid>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/writing-to-SDRAM-problem/m-p/136586#M1814</guid>
      <dc:creator>wmunlai</dc:creator>
      <dc:date>2006-11-17T23:17:14Z</dc:date>
    </item>
    <item>
      <title>Re: writing to SDRAM problem</title>
      <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/writing-to-SDRAM-problem/m-p/136587#M1815</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;Correction to my previous post:&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;It seems that the problem also occurs in the 1st half of SDRAM memory space.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;For example, if I write a byte to the last location at 0x10ffffff, the last location in 1st half of SDRAM space (at 0x107fffff) also gets written.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Does this look like a wiring problem to you?&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sun, 19 Nov 2006 21:11:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/writing-to-SDRAM-problem/m-p/136587#M1815</guid>
      <dc:creator>wmunlai</dc:creator>
      <dc:date>2006-11-19T21:11:00Z</dc:date>
    </item>
    <item>
      <title>Re: writing to SDRAM problem</title>
      <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/writing-to-SDRAM-problem/m-p/136588#M1816</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;I don't know your board, so I can't say if the settings are right or not, but you have a comment in your script that refers to a 32bit port and you say that your SDRAM is connected on a 16bit bus so you should sheck that.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Also, I had similar confusing issues with SDRAM using a 5282, until I realised that the cpu reset my SDRAM port size to 16 bit when booting from external flash. Only you can say if you have a wiring problem (should be easy enough to find) but there is plenty of scope for the wiring to be fine and the problem to be elsewhere!&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Good luck.&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 21 Nov 2006 02:45:21 GMT</pubDate>
      <guid>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/writing-to-SDRAM-problem/m-p/136588#M1816</guid>
      <dc:creator>mccPaul</dc:creator>
      <dc:date>2006-11-21T02:45:21Z</dc:date>
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    <item>
      <title>Re: writing to SDRAM problem</title>
      <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/writing-to-SDRAM-problem/m-p/136589#M1817</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;Hi,&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;we found the problem.....it was because of a wrong wiring!&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Thanks for&amp;nbsp;all advice given!&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Mun Lai&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 24 Nov 2006 22:14:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/writing-to-SDRAM-problem/m-p/136589#M1817</guid>
      <dc:creator>wmunlai</dc:creator>
      <dc:date>2006-11-24T22:14:16Z</dc:date>
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    <item>
      <title>Re: writing to SDRAM problem</title>
      <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/writing-to-SDRAM-problem/m-p/136590#M1818</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Mun Lai&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I'm facing the same problem as yours. When I write to one location, the location offset by 200 hex also be updated.&amp;nbsp;&lt;/P&gt;&lt;P&gt;for example, write to 0x40000000 with value 12 causes the location 0x40000200 updated with 12&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;You have mentioned you have the wiring problem, can you tell me which wrong wires cause that problem ?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thank you.&lt;/P&gt;&lt;P&gt;Edison.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 07 May 2009 04:18:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/writing-to-SDRAM-problem/m-p/136590#M1818</guid>
      <dc:creator>Edison_Tran</dc:creator>
      <dc:date>2009-05-07T04:18:15Z</dc:date>
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