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    <title>topic Re: MCF547x Interrupt latency in ColdFire/68K Microcontrollers and Processors</title>
    <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/MCF547x-Interrupt-latency/m-p/135798#M1686</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;Hi Rik,&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Thanks for the informations. I'm in the same situation as you.... Fighting against this buggy chip.&lt;/DIV&gt;&lt;DIV&gt;I will no more used a V4 core for my next designs. The chip specifications were quite good on the paper but the real behaviour is far from what was announced &lt;IMG alt=":smileysad:" class="emoticon emoticon-smileysad" id="smileysad" src="http://freescale.i.lithium.com/i/smilies/16x16_smiley-sad.gif" title="Smiley Sad" /&gt;&lt;/DIV&gt;&lt;DIV&gt;What's the benefits of a 200MHz core frequency if the rest of the chip is running 10 to 20 times slower ???&lt;/DIV&gt;&lt;DIV&gt;Good luck...&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Nicolas&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 13 Nov 2006 16:24:23 GMT</pubDate>
    <dc:creator>salocin</dc:creator>
    <dc:date>2006-11-13T16:24:23Z</dc:date>
    <item>
      <title>MCF547x Interrupt latency</title>
      <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/MCF547x-Interrupt-latency/m-p/135796#M1684</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;Hello,&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;In my current project, I need to relatively react quickly to an external interrupt.&lt;/DIV&gt;&lt;DIV&gt;After some measurements, I found that the processor needs more than 700ns after the interrupt edge to enter in the interrupt routine !!!&lt;/DIV&gt;&lt;DIV&gt;I have no operating system,&amp;nbsp;the interrupt code/data&amp;nbsp;are located in the core RAM and this interrupt has the highest priority level.&lt;/DIV&gt;&lt;DIV&gt;The system bus freq is 100MHz while the core frequency is 200MHz.&lt;/DIV&gt;&lt;DIV&gt;Any ideas ????&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Nicolas&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 08 Nov 2006 22:49:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/MCF547x-Interrupt-latency/m-p/135796#M1684</guid>
      <dc:creator>salocin</dc:creator>
      <dc:date>2006-11-08T22:49:42Z</dc:date>
    </item>
    <item>
      <title>Re: MCF547x Interrupt latency</title>
      <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/MCF547x-Interrupt-latency/m-p/135797#M1685</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;Hello.&lt;/DIV&gt;&lt;DIV&gt;I've been fighting a MCF5485 for months.&lt;/DIV&gt;&lt;DIV&gt;There seems to be a major problem with the core to XLB bus connection. Maybe that's the source of your problem too. I did a test for reading memory (move.l) , the code was in core SRAM1 and this was what I got:&lt;/DIV&gt;&lt;DIV&gt;reading core SRAM0, 1 cycle&lt;/DIV&gt;&lt;DIV&gt;reading sys SRAM, 20 cycles !!!&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;The answer I got was that there are 2 "gaskets" which the core has to pass to the XLB.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Cheers,&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;RIk.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;ps. Also the DMA task swapping is enormously slow.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sun, 12 Nov 2006 21:12:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/MCF547x-Interrupt-latency/m-p/135797#M1685</guid>
      <dc:creator>Rik</dc:creator>
      <dc:date>2006-11-12T21:12:24Z</dc:date>
    </item>
    <item>
      <title>Re: MCF547x Interrupt latency</title>
      <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/MCF547x-Interrupt-latency/m-p/135798#M1686</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;Hi Rik,&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Thanks for the informations. I'm in the same situation as you.... Fighting against this buggy chip.&lt;/DIV&gt;&lt;DIV&gt;I will no more used a V4 core for my next designs. The chip specifications were quite good on the paper but the real behaviour is far from what was announced &lt;IMG alt=":smileysad:" class="emoticon emoticon-smileysad" id="smileysad" src="http://freescale.i.lithium.com/i/smilies/16x16_smiley-sad.gif" title="Smiley Sad" /&gt;&lt;/DIV&gt;&lt;DIV&gt;What's the benefits of a 200MHz core frequency if the rest of the chip is running 10 to 20 times slower ???&lt;/DIV&gt;&lt;DIV&gt;Good luck...&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Nicolas&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 13 Nov 2006 16:24:23 GMT</pubDate>
      <guid>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/MCF547x-Interrupt-latency/m-p/135798#M1686</guid>
      <dc:creator>salocin</dc:creator>
      <dc:date>2006-11-13T16:24:23Z</dc:date>
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