<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>ColdFire/68K Microcontrollers and ProcessorsのトピックRe: Coldfire Exception processing</title>
    <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/Coldfire-Exception-processing/m-p/124710#M142</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;That's right. If you are 'testing' the accessability of a memory location, you must either skip past the instruction that caused the access error (ie. increment the PC in the exception stack frame) or write the access test in assembler using indirect addressing with a specific Ax register which you modify to a safe location in the exception processing. For instance:&lt;BR /&gt;&lt;BR /&gt;C declaration: &lt;BR /&gt;&amp;gt; int readLongTest(void*); /* return 0 on success */&lt;BR /&gt;&lt;BR /&gt;Assembler:&lt;BR /&gt;&amp;gt; _readLongTest:&lt;BR /&gt;&amp;gt; clr.l d0&lt;BR /&gt;&amp;gt; move.l 4(sp),a0&lt;BR /&gt;&amp;gt; move.l (a0),d1&lt;BR /&gt;&amp;gt; rts&lt;BR /&gt;&amp;gt;&lt;BR /&gt;&amp;gt; _accessErrorHandler: /* install on vector 2 */&lt;BR /&gt;&amp;gt; not.l d0&lt;BR /&gt;&amp;gt; clr.l a0&lt;BR /&gt;&amp;gt; rte&lt;BR /&gt;&lt;BR /&gt;Hope this helps.&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Sat, 22 Jul 2006 01:18:04 GMT</pubDate>
    <dc:creator>mvincent</dc:creator>
    <dc:date>2006-07-22T01:18:04Z</dc:date>
    <item>
      <title>Coldfire Exception processing</title>
      <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/Coldfire-Exception-processing/m-p/124709#M141</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;SPAN&gt;Hello,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I have a question on the exception processing of the Coldfire MCF5235 CPU.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;The Coldfire Programmer's Reference Manual (Ch. 11, p. 11-1) states that "Coldfire v2 and v3 use an instruction restart exception model".&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Does this mean that when I generate an access error with an operand fetch, after returning from the exception handler with RTE, the CPU&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;will retry the same instruction ?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;TIA&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 21 Jul 2006 22:36:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/Coldfire-Exception-processing/m-p/124709#M141</guid>
      <dc:creator>stzari</dc:creator>
      <dc:date>2006-07-21T22:36:46Z</dc:date>
    </item>
    <item>
      <title>Re: Coldfire Exception processing</title>
      <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/Coldfire-Exception-processing/m-p/124710#M142</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;That's right. If you are 'testing' the accessability of a memory location, you must either skip past the instruction that caused the access error (ie. increment the PC in the exception stack frame) or write the access test in assembler using indirect addressing with a specific Ax register which you modify to a safe location in the exception processing. For instance:&lt;BR /&gt;&lt;BR /&gt;C declaration: &lt;BR /&gt;&amp;gt; int readLongTest(void*); /* return 0 on success */&lt;BR /&gt;&lt;BR /&gt;Assembler:&lt;BR /&gt;&amp;gt; _readLongTest:&lt;BR /&gt;&amp;gt; clr.l d0&lt;BR /&gt;&amp;gt; move.l 4(sp),a0&lt;BR /&gt;&amp;gt; move.l (a0),d1&lt;BR /&gt;&amp;gt; rts&lt;BR /&gt;&amp;gt;&lt;BR /&gt;&amp;gt; _accessErrorHandler: /* install on vector 2 */&lt;BR /&gt;&amp;gt; not.l d0&lt;BR /&gt;&amp;gt; clr.l a0&lt;BR /&gt;&amp;gt; rte&lt;BR /&gt;&lt;BR /&gt;Hope this helps.&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sat, 22 Jul 2006 01:18:04 GMT</pubDate>
      <guid>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/Coldfire-Exception-processing/m-p/124710#M142</guid>
      <dc:creator>mvincent</dc:creator>
      <dc:date>2006-07-22T01:18:04Z</dc:date>
    </item>
    <item>
      <title>Re: Coldfire Exception processing</title>
      <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/Coldfire-Exception-processing/m-p/124711#M143</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;Thanks a lot.&lt;BR /&gt;&lt;BR /&gt;This confirms my suspicions, why my code (that works fine on different 683xx) crashes my Coldfire board.&lt;BR /&gt;&lt;BR /&gt;St.&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 24 Jul 2006 15:40:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/Coldfire-Exception-processing/m-p/124711#M143</guid>
      <dc:creator>stzari</dc:creator>
      <dc:date>2006-07-24T15:40:15Z</dc:date>
    </item>
  </channel>
</rss>

