ColdFire/68K Microcontrollers and ProcessorsのトピックMCF5208 eDMA to UART bus error

MCF5208 eDMA to UART bus error

nspon — Fri, 18 May 2007 11:08:31 GMT

I'm using CW 6.3, writing code for an MCF5208.

I'm trying to drive UART 0 with the eDMA controller. I have set up a TCD for channel 2 (which is the transmit channel for UART 0) but a few microseconds after enabling the DMA requests, I get the DBE error bit set in EDMA_ES, saying that there was a bus error on the destination write for channel 2. This is rather mysterious as I can then read back from the TCD and confirm that DADDR is set to 0xFC06000C (the UART 0 TBD) and that ATTR is set to 0, specifying an 8-bit wide source and destination transfer size. Is there something else I need to do to persuade the eDMA controller to write to the UART? My own code can write to the UART 0 TBD without difficulty in the same context...

Thanks,
Nigel

Re: MCF5208 eDMA to UART bus error

SimonMarsden_de — Fri, 18 May 2007 15:35:13 GMT

Hello Nigel

The following are only guesses, but they might help if you're running out of ideas:

(1) The Master Privilege Register (MPR) and Peripheral Access Control Registers (PACRn) can be configured to enable/disable reads and writes from various bus masters (e.g. DMA) to various periherals (e.g. UART).

Maybe these are set in such a way that they are causing the problem?

The MPR and PACRn are part of the System Control Module.

(2) In the DMA TCD, have you got the DOFF field in TCD word 5 set to a non-zero value? If so, the destination address will increment after the first transfer, so the second transfer might be to a 'rogue' address.

Good luck

Simon

Re: MCF5208 eDMA to UART bus error

nspon — Mon, 21 May 2007 05:46:19 GMT

The first of your suggestions was the problem; it hadn't occurred to me that the eDMA would default to untrusted. It would be nice if Freescale put a note to this effect in the eDMA chapter, as the SCM chapter is not the first place one would look for problems of this sort...

Thanks,
Nigel