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    <title>topic DSPI communication in ColdFire/68K Microcontrollers and Processors</title>
    <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/DSPI-communication/m-p/966320#M13847</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;SPI communication, the pin DSPIPCS0/1/2/5&amp;nbsp; are used out.&lt;/P&gt;&lt;P&gt;Can i use the another common GPIO to select the CS for SPI communication ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_1.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/90870i0E33B9D3CA046F83/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_1.png" alt="pastedImage_1.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 10 Jul 2019 07:55:58 GMT</pubDate>
    <dc:creator>johnsonzhang1</dc:creator>
    <dc:date>2019-07-10T07:55:58Z</dc:date>
    <item>
      <title>DSPI communication</title>
      <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/DSPI-communication/m-p/966320#M13847</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;SPI communication, the pin DSPIPCS0/1/2/5&amp;nbsp; are used out.&lt;/P&gt;&lt;P&gt;Can i use the another common GPIO to select the CS for SPI communication ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_1.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/90870i0E33B9D3CA046F83/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_1.png" alt="pastedImage_1.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 10 Jul 2019 07:55:58 GMT</pubDate>
      <guid>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/DSPI-communication/m-p/966320#M13847</guid>
      <dc:creator>johnsonzhang1</dc:creator>
      <dc:date>2019-07-10T07:55:58Z</dc:date>
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    <item>
      <title>Re: DSPI communication</title>
      <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/DSPI-communication/m-p/966321#M13848</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Yes, customer can use the GPIO pin to emulate SPI chip select signal.&lt;/P&gt;&lt;P&gt;Please make sure during SPI communication, the SPI chip select should be active. Thanks.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Mike&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-------------------------------------------------------------------------------&lt;BR /&gt;Note:&lt;BR /&gt;- If this post answers your question, please click the "Mark Correct" button. Thank you!&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;- We are following threads for 7 weeks after the last post, later replies are ignored&lt;BR /&gt; Please open a new thread and refer to the closed one, if you have a related question at a later point in time.&lt;BR /&gt;-------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 11 Jul 2019 08:39:54 GMT</pubDate>
      <guid>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/DSPI-communication/m-p/966321#M13848</guid>
      <dc:creator>Hui_Ma</dc:creator>
      <dc:date>2019-07-11T08:39:54Z</dc:date>
    </item>
    <item>
      <title>Re: DSPI communication</title>
      <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/DSPI-communication/m-p/966322#M13849</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Yes, this is possible. But it prevents you using all of the advanced features of the QSPI. Using its own chip-selects you can load the QSPI RAM with up to 16 transfers to different chips and let it run all of them automatically. To use a GPIO instead of a chip select the driver has to program one transfer only in the QSPI RAM, and then assert and deassert the chip select around that transfer.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;If you're not using these features and don't need the efficiency, CPU offloading and speed, then it doesn't matter.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;It might be better to swap spare GPIOs with any of the QSPI Chip Selects that are being used as GPIOs.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Also, if you can free up one chip-select, to have two QSPI CS pins, then you can use an external address decoder to generate three chip-selects. Or three pins to generate seven chip-selects.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Tom&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 11 Jul 2019 23:44:51 GMT</pubDate>
      <guid>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/DSPI-communication/m-p/966322#M13849</guid>
      <dc:creator>TomE</dc:creator>
      <dc:date>2019-07-11T23:44:51Z</dc:date>
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