topic Re: MCF54417 RMII in ColdFire/68K Microcontrollers and Processors https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/MCF54417-RMII/m-p/883799#M13706 <HTML><HEAD></HEAD><BODY><P>Hello,</P><P></P><P>Well, from the hardware schematic, I do not think that the pull-up/pull-down is a issue. Actually as mentioned by the datasheet of KSZ8081RNA that:</P><P>"The PHYAD[1:0] strap-in pin is latched at the de-assertion of reset. In some systems, the RMII MAC receive input pins may drive high/low during power-up or reset, and consequently cause the PHYAD[1:0] strap-in pin, a shared pin with the RMII CRS_DV signal, to be latched to the unintended high/low state. In this case an external pull-up (4.7 kΩ) or pulldown (1.0 kΩ) should be added on the PHYAD[1:0] strap-in pin to ensure that the intended value is strapped-in correctly."</P><P></P><P>So my query is for software driver, do you config the PHY driver correctly? We only provide the DP83849I driver with TWR-MCF5441X.</P></BODY></HTML> Thu, 14 Feb 2019 06:21:05 GMT miduo 2019-02-14T06:21:05Z MCF54417 RMII https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/MCF54417-RMII/m-p/883798#M13705 <HTML><HEAD></HEAD><BODY><P>Processor:&nbsp; MCF54417</P><P></P><P>I am tasked with troubleshooting someone else's MCF54417 RMII design.&nbsp; We seem to be losing connectivity intermittently.</P><P></P><P>Attached is the layout.&nbsp; I am wondering the pull-up and pull-down resistors on RMII_CRS_DV are correct?&nbsp; There is a pull-up on RMII0 and a pull-down on RMII1?&nbsp; Any other external components missing?</P><P></P><P>Please advise.</P></BODY></HTML> Mon, 04 Feb 2019 19:28:04 GMT https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/MCF54417-RMII/m-p/883798#M13705 bplatt 2019-02-04T19:28:04Z Re: MCF54417 RMII https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/MCF54417-RMII/m-p/883799#M13706 <HTML><HEAD></HEAD><BODY><P>Hello,</P><P></P><P>Well, from the hardware schematic, I do not think that the pull-up/pull-down is a issue. Actually as mentioned by the datasheet of KSZ8081RNA that:</P><P>"The PHYAD[1:0] strap-in pin is latched at the de-assertion of reset. In some systems, the RMII MAC receive input pins may drive high/low during power-up or reset, and consequently cause the PHYAD[1:0] strap-in pin, a shared pin with the RMII CRS_DV signal, to be latched to the unintended high/low state. In this case an external pull-up (4.7 kΩ) or pulldown (1.0 kΩ) should be added on the PHYAD[1:0] strap-in pin to ensure that the intended value is strapped-in correctly."</P><P></P><P>So my query is for software driver, do you config the PHY driver correctly? We only provide the DP83849I driver with TWR-MCF5441X.</P></BODY></HTML> Thu, 14 Feb 2019 06:21:05 GMT https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/MCF54417-RMII/m-p/883799#M13706 miduo 2019-02-14T06:21:05Z