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    <title>ColdFire/68K Microcontrollers and ProcessorsのトピックMCF54415 boot from NorFlash failed</title>
    <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/MCF54415-boot-from-NorFlash-failed/m-p/686880#M13251</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;We are using MCF54415 with BDM mode.&lt;/P&gt;&lt;P&gt;The mcf54415 boot from &amp;nbsp;a 4M_8bits_NorFlash.&lt;/P&gt;&lt;P&gt;I have modified the *.lcf to make almost all &amp;nbsp;.code segment ,.data segment and .bss&amp;nbsp;segment &amp;nbsp;in ROM mode as the same as in RAM mode.&lt;/P&gt;&lt;P&gt;In ROM mode , the board can startup OK,&amp;nbsp;copy all codes / data to the right address and clear the .bss segment.&lt;/P&gt;&lt;P&gt;Now all my codes are running OK in RAM mode, but when in ROM mode , the board failed.&lt;/P&gt;&lt;P&gt;In ROM mode, a task of CAN communication timed out. In RAM mode , use the same codes, the CAN task will not time out. &amp;nbsp;&lt;/P&gt;&lt;P&gt;I want to know why the same code running &amp;nbsp;different results in RAM and ROM mode.&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Original Attachment has been moved to: &lt;A _jive_internal="true" href="https://community.nxp.com/docs/DOC-337751"&gt;RAM_ROM_xMAP.rar&lt;/A&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 14 Jun 2017 06:29:53 GMT</pubDate>
    <dc:creator>changliu1</dc:creator>
    <dc:date>2017-06-14T06:29:53Z</dc:date>
    <item>
      <title>MCF54415 boot from NorFlash failed</title>
      <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/MCF54415-boot-from-NorFlash-failed/m-p/686880#M13251</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;We are using MCF54415 with BDM mode.&lt;/P&gt;&lt;P&gt;The mcf54415 boot from &amp;nbsp;a 4M_8bits_NorFlash.&lt;/P&gt;&lt;P&gt;I have modified the *.lcf to make almost all &amp;nbsp;.code segment ,.data segment and .bss&amp;nbsp;segment &amp;nbsp;in ROM mode as the same as in RAM mode.&lt;/P&gt;&lt;P&gt;In ROM mode , the board can startup OK,&amp;nbsp;copy all codes / data to the right address and clear the .bss segment.&lt;/P&gt;&lt;P&gt;Now all my codes are running OK in RAM mode, but when in ROM mode , the board failed.&lt;/P&gt;&lt;P&gt;In ROM mode, a task of CAN communication timed out. In RAM mode , use the same codes, the CAN task will not time out. &amp;nbsp;&lt;/P&gt;&lt;P&gt;I want to know why the same code running &amp;nbsp;different results in RAM and ROM mode.&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Original Attachment has been moved to: &lt;A _jive_internal="true" href="https://community.nxp.com/docs/DOC-337751"&gt;RAM_ROM_xMAP.rar&lt;/A&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 14 Jun 2017 06:29:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/MCF54415-boot-from-NorFlash-failed/m-p/686880#M13251</guid>
      <dc:creator>changliu1</dc:creator>
      <dc:date>2017-06-14T06:29:53Z</dc:date>
    </item>
    <item>
      <title>Re: MCF54415 boot from NorFlash failed</title>
      <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/MCF54415-boot-from-NorFlash-failed/m-p/686881#M13252</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Do you interface the NOR flash with the Flexbus? The booting process from FlexBus should be automatic depending on the BOOTMOD[1:0] pins. When they are 0:0, it boots from flexbus with default configuration, but with this configuration, the port size is 8bit. Therefore you need to configure the BOOTMOD[1:0] = 01. And use the FB:AD[7:0] pins to configure the boot configurations. &lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 28 Sep 2017 18:13:44 GMT</pubDate>
      <guid>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/MCF54415-boot-from-NorFlash-failed/m-p/686881#M13252</guid>
      <dc:creator>miduo</dc:creator>
      <dc:date>2017-09-28T18:13:44Z</dc:date>
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