Coldfire processor lock up

NAG — Wed, 27 May 2015 13:26:24 GMT

Hello,

Our system is based on Coldfire Micro MCF52235, and the Hardware

design is very similar to EVAL board. In our current design the 25MHZ clock input comes from
EMI Reduction clock Generator, and that IC is getting obsolete and so we
are testing the performance with the new EMI reduction clock Generator IC
(P2781A from ON SEMI), and with this new IC we are seeing good
25MHZ signal generated but the controller is not booting up most of the
times, if we recycle the power several times, occasionally it is booting OK.
Once It boots up it continuous to work good.

When the Controller is in lockup condition, I have tried to generate RESET
to controller (by shorting RSTI pin to ground, as we use simple RC network
to generate RESET to micro) , but there is no use, the Micro is not
responding and continue to stay in that lock up condition.

I am not really What is controller doing during that lockup condition and
why it is not responding to RESET, Do you have any ideas how to overcome this situation?
Please note that the RCON pin has pullup resistor of value 4.7K.

Re: Coldfire processor lock up

TomE — Thu, 28 May 2015 00:00:58 GMT

Your question is very similar to one I participated in on May 11 2015. I suggest you read through it.

https://community.freescale.com/thread/355209

The above relates to an MC68332, which is a 20 year old part. It looks like newer designs can still lock up the same way if you disobey the rules in the Data Sheet.

> with the new EMI reduction clock Generator IC
> (P2781A from ON SEMI), and with this new IC we are seeing good
> 25MHZ signal generated

I'll start with what I think is your problem, then throw in some other things to look at later.

You need to capture the oscillator waveform from power-on to see if it "glitches" between having no output and being stable. You should also compare it with the old one (which didn't give you any trouble) and look for obvious differences in voltage, timing or frequency during the startup.

I expect that at some point it is violating some of the Data Sheet items for the CPU. The ones I'm considering that are in the Data Sheet are:

Vxtal, Vih, Vil,

Vihext, Vilext,

Tdc

The known ones that AREN'T listed in the Data Sheet are the minimum clock high time, minimum low time, and maximum and minimum slew rates. Some systems don't like fast slew rates, and most don't like slow slew rates (as they can trigger multiple times on a slow rising edge). The only figure given is "Tdc" which is "40% to 60%". What CPU really don't like is narrow high-going or low-going pulses on the clock input. That can wedge the internals of the CPU, which is what you're seeing.

Here's what can happen with a simple oscillator. Crystals take a while to start, often 10ms or more. As they build up resonance, their output voltage starts from zero, and usually looks like an increasing amplitude sin wave. As this voltage passes through the threshold of whatever gate or chip is receiving that signal, the output starts switching. It must be tricky to come up with a design that doesn't start generating (say) 10%/90% duty cycle, and only gets to 50%/50% when the crystal voltage is at full amplitude. If you get "glitches" on startup the internals of the CPU can get into states they can't get out of.

The On Semi chip looks pretty sophisticated, and like it might actively avoid doing this. You should still check with an oscilloscope. You might also want to check the Loop Filter you have on it.

Check Trivt. Is Reset asserted from power-up and held low until after the clock input is stable? Maybe the new oscillator takes longer to start than the reset assertion time?

Have you read the Errata? Specifically "SECF195: OSC: Limited input voltage range on EXTAL pin"? You have to have a resistive divider between the oscillator and the EXTAL pin.

Is the oscillator running from the same power supply as the CPU? Are there any separate supply of filter paths that might have the rails for the CPU and Oscillator not tracking each other?

How fast or slow is your power supply startup? Does it get from 0 to 3.3V in microseconds, does it "slow-start" over tens of milliseconds or somewhere inbetween? At what point during the ramp does the POR controller start driving reset LOW (or is it pulled low from startup properly)? At what point during the ramp does the oscillator start generating output? Where is it during the startup, low, following VCC or somewhere in the middle (bad)? Can you fix the problem with a high value pullup or pulldown resistor on EXTAL?

Tom

Re: Coldfire processor lock up

NAG — Wed, 10 Jun 2015 14:57:19 GMT

Hello Tom,

I apologize for my late reply and thanks for the ERRATA info, I have used voltage divider to reduce the EXTAL clock input below 3.0V as mentioned in the ERRATA and it is working now.

Thanks again,

Naga.

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Coldfire processor lock up

Re: Coldfire processor lock up

Re: Coldfire processor lock up