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    <title>ColdFire/68K Microcontrollers and ProcessorsのトピックSTOP mode on MCF523x</title>
    <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/STOP-mode-on-MCF523x/m-p/132463#M1101</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;Hello Coldfire Group:&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;I am having trouble getting my 5232 part to go into low power stop mode.&lt;/DIV&gt;&lt;DIV&gt;I set the LPCR regsiter to 0xC8.&lt;/DIV&gt;&lt;DIV&gt;I set the LPICR register to 0xF0.&lt;/DIV&gt;&lt;DIV&gt;I issue the STOP instruction with a 0x2700 following.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;I do enter the STOP instruction because execution halts. I am at the STOP&lt;/DIV&gt;&lt;DIV&gt;because when I am on the BDM and I halt, my PC is right after the STOP.&lt;/DIV&gt;&lt;DIV&gt;But the CLKOUT is still running and the current does not fall much.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;The documentation says that CLKOUT should stop when the STPMD bit in LPCR is hi.&lt;/DIV&gt;&lt;DIV&gt;I have read back the registers and all seems OK.&lt;/DIV&gt;&lt;DIV&gt;The LPICR reads back as oxFF and resets to 0x0F. Not sure why that is since the manual&lt;/DIV&gt;&lt;DIV&gt;says that it defaults to 0x00.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;It seems that I am entering STOP but it is not turning off clocks to the CORE, etc.&lt;/DIV&gt;&lt;DIV&gt;It is like the ENBSTOP bit is not set in the LPICR register.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Any ideas.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Thanks,&lt;/DIV&gt;&lt;DIV&gt;Allen&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 02 May 2007 22:29:41 GMT</pubDate>
    <dc:creator>anance</dc:creator>
    <dc:date>2007-05-02T22:29:41Z</dc:date>
    <item>
      <title>STOP mode on MCF523x</title>
      <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/STOP-mode-on-MCF523x/m-p/132463#M1101</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;Hello Coldfire Group:&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;I am having trouble getting my 5232 part to go into low power stop mode.&lt;/DIV&gt;&lt;DIV&gt;I set the LPCR regsiter to 0xC8.&lt;/DIV&gt;&lt;DIV&gt;I set the LPICR register to 0xF0.&lt;/DIV&gt;&lt;DIV&gt;I issue the STOP instruction with a 0x2700 following.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;I do enter the STOP instruction because execution halts. I am at the STOP&lt;/DIV&gt;&lt;DIV&gt;because when I am on the BDM and I halt, my PC is right after the STOP.&lt;/DIV&gt;&lt;DIV&gt;But the CLKOUT is still running and the current does not fall much.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;The documentation says that CLKOUT should stop when the STPMD bit in LPCR is hi.&lt;/DIV&gt;&lt;DIV&gt;I have read back the registers and all seems OK.&lt;/DIV&gt;&lt;DIV&gt;The LPICR reads back as oxFF and resets to 0x0F. Not sure why that is since the manual&lt;/DIV&gt;&lt;DIV&gt;says that it defaults to 0x00.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;It seems that I am entering STOP but it is not turning off clocks to the CORE, etc.&lt;/DIV&gt;&lt;DIV&gt;It is like the ENBSTOP bit is not set in the LPICR register.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Any ideas.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Thanks,&lt;/DIV&gt;&lt;DIV&gt;Allen&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 02 May 2007 22:29:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/STOP-mode-on-MCF523x/m-p/132463#M1101</guid>
      <dc:creator>anance</dc:creator>
      <dc:date>2007-05-02T22:29:41Z</dc:date>
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      <title>Re: STOP mode on MCF523x</title>
      <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/STOP-mode-on-MCF523x/m-p/132464#M1102</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;Try setting bit 4 of the LPCR register.&amp;nbsp; I'm not very familiar with this particular device, however other similar devices offer 4 levels of stop modes which are controlled by bits 3 &amp;amp; 4 of that register.&amp;nbsp; This may not be the case with this device, however its&amp;nbsp;worth a shot.&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 23 May 2007 20:51:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/STOP-mode-on-MCF523x/m-p/132464#M1102</guid>
      <dc:creator>macl</dc:creator>
      <dc:date>2007-05-23T20:51:50Z</dc:date>
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    <item>
      <title>Re: STOP mode on MCF523x</title>
      <link>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/STOP-mode-on-MCF523x/m-p/132465#M1103</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;&lt;/DIV&gt;I had the same problem with the MCF52210.&amp;nbsp; Setting the DISCLK bit of the SYNCR register finally disabled the CLKOUT pin.&amp;nbsp; That leaves me wondering what the STPMD bits really do.&amp;nbsp; Nothing?&lt;DIV&gt;&lt;/DIV&gt;&lt;BR /&gt;&lt;BR /&gt;Message Edited by jtsmith on &lt;SPAN class="date_text"&gt;2007-11-01&lt;/SPAN&gt; &lt;SPAN class="time_text"&gt;04:33 PM&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 01 Nov 2007 23:30:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/STOP-mode-on-MCF523x/m-p/132465#M1103</guid>
      <dc:creator>admin</dc:creator>
      <dc:date>2007-11-01T23:30:50Z</dc:date>
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