<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Programming flash memory on 56F8367 (MC56F8367VPYE) using third-party USB-JTAG converter in Using Our Community</title>
    <link>https://community.nxp.com/t5/Using-Our-Community/Programming-flash-memory-on-56F8367-MC56F8367VPYE-using-third/m-p/2152904#M881</link>
    <description>&lt;H4&gt;Hello all,&lt;/H4&gt;&lt;P&gt;&lt;FONT size="4"&gt;I don't have an official USB-JTAG converter; instead, I have an FT4232H chip, which has USB-JTAG support. Using it, I can't program the flash memory of the MC56F8367VPYE. The problem is incompatibility between this converter and CodeWarrior. I only need to upload an S-record file to the chip.&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT size="4"&gt;I used OpenOCD software to connect to the MCU. I even made a flash dump, but I can't upload anything new. I think the problem now is getting access to the CPU with control over flash updating.&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT size="4"&gt;If someone has an OpenOCD config for the 56F8367, please send it. Otherwise, if someone knows a start-up command sequence to get access to edit the flash memory, please share it. Maybe it will help me to write the correct config file.&lt;/FONT&gt;&lt;/P&gt;&lt;LI-CODE lang="markup"&gt;My raw config:


set _CHIPNAME mc56f8367
set _ENDIAN little
set _CPUTAPID 0x01d6d01d


adapter speed 800


jtag newtap $_CHIPNAME chp -irlen 8 -ircapture 1 -irmask 0x03 -expected-id $_CPUTAPID

jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 1 -irmask 0x03 -disable -expected-id $_CPUTAPID
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME dsp5680xx -endian $_ENDIAN -chain-position $_TARGETNAME

jtag configure $_CHIPNAME.chp -event setup "
jtag tapenable $_TARGETNAME
poll off
"

jtag configure $_TARGETNAME -event tap-enable "
irscan $_CHIPNAME.chp 0x05;
drscan $_CHIPNAME.chp 4 0x02;
jtag tapdisable $_CHIPNAME.chp;
"

jtag configure $_CHIPNAME.chp -event tap-enable "
irscan $_TARGETNAME 0x08;
drscan $_TARGETNAME 4 0x1;
jtag tapdisable $_TARGETNAME;
"

set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME dsp5680xx_flash 0 0 2 1 $_TARGETNAME&lt;/LI-CODE&gt;&lt;P&gt;&lt;EM&gt;&lt;BR /&gt;&lt;/EM&gt;&lt;FONT size="4"&gt;Thanks.&lt;/FONT&gt;&lt;/P&gt;</description>
    <pubDate>Fri, 15 Aug 2025 15:15:29 GMT</pubDate>
    <dc:creator>Vanish</dc:creator>
    <dc:date>2025-08-15T15:15:29Z</dc:date>
    <item>
      <title>Programming flash memory on 56F8367 (MC56F8367VPYE) using third-party USB-JTAG converter</title>
      <link>https://community.nxp.com/t5/Using-Our-Community/Programming-flash-memory-on-56F8367-MC56F8367VPYE-using-third/m-p/2152904#M881</link>
      <description>&lt;H4&gt;Hello all,&lt;/H4&gt;&lt;P&gt;&lt;FONT size="4"&gt;I don't have an official USB-JTAG converter; instead, I have an FT4232H chip, which has USB-JTAG support. Using it, I can't program the flash memory of the MC56F8367VPYE. The problem is incompatibility between this converter and CodeWarrior. I only need to upload an S-record file to the chip.&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT size="4"&gt;I used OpenOCD software to connect to the MCU. I even made a flash dump, but I can't upload anything new. I think the problem now is getting access to the CPU with control over flash updating.&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT size="4"&gt;If someone has an OpenOCD config for the 56F8367, please send it. Otherwise, if someone knows a start-up command sequence to get access to edit the flash memory, please share it. Maybe it will help me to write the correct config file.&lt;/FONT&gt;&lt;/P&gt;&lt;LI-CODE lang="markup"&gt;My raw config:


set _CHIPNAME mc56f8367
set _ENDIAN little
set _CPUTAPID 0x01d6d01d


adapter speed 800


jtag newtap $_CHIPNAME chp -irlen 8 -ircapture 1 -irmask 0x03 -expected-id $_CPUTAPID

jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 1 -irmask 0x03 -disable -expected-id $_CPUTAPID
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME dsp5680xx -endian $_ENDIAN -chain-position $_TARGETNAME

jtag configure $_CHIPNAME.chp -event setup "
jtag tapenable $_TARGETNAME
poll off
"

jtag configure $_TARGETNAME -event tap-enable "
irscan $_CHIPNAME.chp 0x05;
drscan $_CHIPNAME.chp 4 0x02;
jtag tapdisable $_CHIPNAME.chp;
"

jtag configure $_CHIPNAME.chp -event tap-enable "
irscan $_TARGETNAME 0x08;
drscan $_TARGETNAME 4 0x1;
jtag tapdisable $_TARGETNAME;
"

set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME dsp5680xx_flash 0 0 2 1 $_TARGETNAME&lt;/LI-CODE&gt;&lt;P&gt;&lt;EM&gt;&lt;BR /&gt;&lt;/EM&gt;&lt;FONT size="4"&gt;Thanks.&lt;/FONT&gt;&lt;/P&gt;</description>
      <pubDate>Fri, 15 Aug 2025 15:15:29 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Using-Our-Community/Programming-flash-memory-on-56F8367-MC56F8367VPYE-using-third/m-p/2152904#M881</guid>
      <dc:creator>Vanish</dc:creator>
      <dc:date>2025-08-15T15:15:29Z</dc:date>
    </item>
  </channel>
</rss>

