MCXN947 DPD entry fails with LPACK timeout

wima88 — Mon, 30 Mar 2026 17:46:33 GMT

Hello,

I'm using following platform

Board :

RTOS : Zephyr 4.3

my goal is to Enter Deep Power Down (DPD) mode in Zephyr. Since Zephyr Lacks PM support in this particular chip. I attempt to port the SDK bare-metal DPD example (mcxn9xxevk_power_mode_switch_low_level) to Zephyr(without using the PM subsystem). but every DPD entry attempt fails with:

CMC SRS = 0x00000810 — LPACK timeout (bit 11) + WARM reset (bit 4)

The SDK example enters DPD successfully with the same LPTMR wakeup config.

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WHAT HAS BEEN RULED OUT
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- SysTick disabled before WFI (CTRL = 0x00000006, bit0=0 confirmed).

SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk; // clear ENABLE bit (bit 0) — stops the counter SCB->ICSR = SCB_ICSR_PENDSTCLR_Msk; // clear any already-pending SysTick interrupt

- WUU flags cleared before entry.
- LPTMR armed correctly: WUU ME = 0x00001000 (module 6, bits[13:12]=01).
- SPC LP_CFG = 0x00021504 — identical to working SDK dump.

The LPACK fires consistently, suggesting an AHB initiator is not ACKing the
low-power request, but it is not clear which one or how to identify it.

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REGISTER DUMP — JUST BEFORE WFI (Zephyr, failing)
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SPC LP_CFG = 0x00021504 (matches SDK )
SPC EVD_CFG = 0x003F1E00 (EVDLPISO = 0x1E for LPTMR wakeup)
SPC LPREQ_CFG = 0x00000003 (EN=1, low-true polarity)
WUU ME = 0x00001000 (LPTMR module wakeup armed )
WUU PF = 0x00000000 (no stale flags)
SysTick CTRL = 0x00000006 (STOPPED)

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QUESTIONS
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Q1. Is there a way to identify WHICH AHB initiator is failing to ACK the LP
request and causing the LPACK timeout?

Q2. Are there any Zephyr-initialized subsystems (UART driver, ARM MPU, cache,
or anything else Zephyr enables at boot) that are known to hold an AHB bus
master active and block DPD entry on MCXN947?

Zephyr ProjectのトピックMCXN947 DPD entry fails with LPACK timeout

MCXN947 DPD entry fails with LPACK timeout