topic Re: csec_keyconfig_s32k148 example run error in S32K

csec_keyconfig_s32k148 example run error

zhigang — Wed, 13 Jan 2021 07:35:00 GMT

Hi all,

I run csec_keyconfig_s32k148 example to test csec nvm key.First I run csec_keyconfig_s32k148 example in flash with jlink,but it reports STATUS_SEC_KEY_UPDATE_ERROR when run CSEC_DRV_LoadKey function.Then, I build the code in ram, and want to repart FlexNVM and FlexRAM, but when I run FLASH_DRV_EraseAllBlock(&flashSSDConfig);, it reports FSTAT->ACCERR error. My SOSC clock is 16000000Hz, and I have reconfig the clock setting in ProcessorExpert.pe. and SPLL div set /2. I don't know why it reports this error.

Re: csec_keyconfig_s32k148 example run error

danielmartynek — Fri, 15 Jan 2021 10:53:32 GMT

Hi,

Please take a look at the SDK documentation

The example must be run from SRAM first to partition the MCU for CSEc.

And once it has been partitioned, the MCU cannot be mass erased until the keys are removed.

Since you can't mass erase the MCU, I assume it has been partitioned, please run the example with ERASE_ALL_KEYS = 1.

After that, you should be able to mass erase and partition the MCU again.

Regards,

Daniel

Re: csec_keyconfig_s32k148 example run error

zhigang — Mon, 18 Jan 2021 06:10:19 GMT

Hi Daniel,

I call eraseKeys before erase all Flash blocks use PEmicro.

if (flashSSDConfig.EEESize == 0) { #if ERASE_ALL_KEYS if (eraseKeys()) { PINS_DRV_SetPins(GPIO_PORT, 1 << LED_RED); PINS_DRV_SetPins(GPIO_PORT, 1 << LED_GREEN); } #endif

Then,I can't debug the code with PEmicro.It reports bus error.I have no io pin to indicate if it success. Then I run example from flash, It still reports CSEC_KEY_UPDATE_ERROR, when I call

stat = CSEC_DRV_LoadKey(CSEC_MASTER_ECU, m1, m2, m3, m4, m5);

Can I use PEmicro to watch if it runs example successfully?

Re: csec_keyconfig_s32k148 example run error

danielmartynek — Wed, 20 Jan 2021 09:40:58 GMT

Hi,

You can step the eraseKeys() function and the whole example to see which operation fails.

Also, please make sure that the application is indeed in SRAM by reading the program counter.

Thank you,

BR, Daniel