Issue regarding selection of external clock source - NXP S32K144

arajan — Thu, 24 Dec 2020 13:17:14 GMT

Hello,

I am trying to enable the external crystal oscillator for our S32K144 MCU based in-house board.

I have taken the S32K144_Project_FlexCAN example project as a reference for the same.

My observations are as follows -
I have disabled the EREFS bit as mentioned in the Reference manual to select the external clock as the clock source.

After doing this configuration, the sys OSC clk valid bit is not setting when we read it, and it is therefore hanging in the while loop. I am attaching the snapshots of the code here as well -

void SOSC_init_16MHz(void) { /*! * SOSC Initialization (8 MHz): * =================================================== */ SCG->SOSCDIV = SCG_SOSCDIV_SOSCDIV1(1)| SCG_SOSCDIV_SOSCDIV2(1); /* SOSCDIV1 & SOSCDIV2 =1: divide by 1 */ SCG->SOSCCFG |= (0x3 << 4); // 11 : High frequency range selected for the crystal oscillator SCG->SOSCCFG &= ~(0x1 << 3); // 0 : HGO bit for low gain operation SCG->SOSCCFG &= ~(0x1 << 2); // EREFS : 0 , external clock selected while(SCG->SOSCCSR & SCG_SOSCCSR_LK_MASK); /* Ensure SOSCCSR unlocked */ SCG->SOSCCSR = SCG_SOSCCSR_SOSCEN_MASK; /* LK=0: SOSCCSR can be written */ /* SOSCCMRE=0: OSC CLK monitor IRQ if enabled */ /* SOSCCM=0: OSC CLK monitor disabled */ /* SOSCERCLKEN=0: Sys OSC 3V ERCLK output clk disabled */ /* SOSCLPEN=0: Sys OSC disabled in VLP modes */ /* SOSCSTEN=0: Sys OSC disabled in Stop modes */ /* SOSCEN=1: Enable oscillator */ while(!(SCG->SOSCCSR & SCG_SOSCCSR_SOSCVLD_MASK)); /* Wait for sys OSC clk valid */ }

Also, we have the external clock connected on the following pins on the hardware -

- PTB7 and PTB6

We want to use the external crystal oscillator as our clock source, please let us know if the configurations are correct or need some changes.

Thanks & Regards
Ajay Rajan

Re: Issue regarding selection of external clock source - NXP S32K144

Robin_Shen — Tue, 29 Dec 2020 05:49:17 GMT

Hi arajan,

If crystal is used, then you need you enable(set 1) the SCG_SOSCCFG[EREFS] bit.

Best Regards,
Robin
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Issue regarding selection of external clock source - NXP S32K144

Re: Issue regarding selection of external clock source - NXP S32K144