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    <title>S32KのトピックADC DMA software trigger</title>
    <link>https://community.nxp.com/t5/S32K/ADC-DMA-software-trigger/m-p/1202461#M9338</link>
    <description>&lt;P&gt;S32K148 -&amp;gt; 144 LQFP&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Hi community&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;while(1)&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; ADC_DRV_ConfigChan(INST_ADCONV1, 0U, &amp;amp;adConv1_ChnConfig0);&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; OS_Sleep(100);&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Example 1 (OK): It Can touch the DMA,&lt;/SPAN&gt;void DMA_ADC1_CHANNEL1(void *parameter, edma_chn_status_t status).&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;while(1)&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; ADC_DRV_ConfigChan(INST_ADCONV1, 3U, &amp;amp;adConv1_ChnConfig0);&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; OS_Sleep(100);&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Example 2(NG): It Cann't touch the DMA,void DMA_ADC1_CHANNEL1(void *parameter, edma_chn_status_t status).&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Could you please help me to see what the problem is&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;#include "dmaController1.h"&lt;/P&gt;&lt;P&gt;edma_state_t dmaController1_State;&lt;/P&gt;&lt;P&gt;edma_chn_state_t dmaController1Chn0_State;&lt;/P&gt;&lt;P&gt;edma_chn_state_t dmaController1Chn1_State;&lt;/P&gt;&lt;P&gt;edma_chn_state_t * const edmaChnStateArray[] = {&lt;BR /&gt;&amp;amp;dmaController1Chn0_State,&lt;BR /&gt;&amp;amp;dmaController1Chn1_State&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;edma_channel_config_t dmaController1Chn0_Config = {&lt;BR /&gt;.channelPriority = EDMA_CHN_DEFAULT_PRIORITY,&lt;BR /&gt;.virtChnConfig = EDMA_CHN0_NUMBER,&lt;BR /&gt;.source = EDMA_REQ_ADC0,&lt;BR /&gt;.callback = DMA_ADC0_CHANNEL0,&lt;BR /&gt;.callbackParam = NULL,&lt;BR /&gt;.enableTrigger = false&lt;BR /&gt;};&lt;BR /&gt;edma_channel_config_t dmaController1Chn1_Config = {&lt;BR /&gt;.channelPriority = EDMA_CHN_DEFAULT_PRIORITY,&lt;BR /&gt;.virtChnConfig = EDMA_CHN1_NUMBER,&lt;BR /&gt;.source = EDMA_REQ_ADC1,&lt;BR /&gt;.callback = DMA_ADC1_CHANNEL1,&lt;BR /&gt;.callbackParam = NULL,&lt;BR /&gt;.enableTrigger = false&lt;BR /&gt;};&lt;BR /&gt;const edma_channel_config_t * const edmaChnConfigArray[] = {&lt;BR /&gt;&amp;amp;dmaController1Chn0_Config,&lt;BR /&gt;&amp;amp;dmaController1Chn1_Config&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;const edma_user_config_t dmaController1_InitConfig0 = {&lt;BR /&gt;.chnArbitration = EDMA_ARBITRATION_FIXED_PRIORITY,&lt;BR /&gt;.haltOnError = false&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;/* END dmaController1. */&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;#include "adConv1.h"&lt;/P&gt;&lt;P&gt;/*! adConv1 configuration structure */&lt;BR /&gt;const adc_converter_config_t adConv1_ConvConfig0 = {&lt;BR /&gt;.clockDivide = ADC_CLK_DIVIDE_1,&lt;BR /&gt;.sampleTime = 13U,&lt;BR /&gt;.resolution = ADC_RESOLUTION_12BIT,&lt;BR /&gt;.inputClock = ADC_CLK_ALT_1,&lt;BR /&gt;.trigger = ADC_TRIGGER_SOFTWARE,&lt;BR /&gt;.pretriggerSel = ADC_PRETRIGGER_SEL_PDB,&lt;BR /&gt;.triggerSel = ADC_TRIGGER_SEL_PDB,&lt;BR /&gt;.dmaEnable = true,&lt;BR /&gt;.voltageRef = ADC_VOLTAGEREF_VREF,&lt;BR /&gt;.continuousConvEnable = false,&lt;BR /&gt;.supplyMonitoringEnable = false,&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;const adc_chan_config_t adConv1_ChnConfig0 = {&lt;BR /&gt;.interruptEnable = false,&lt;BR /&gt;.channel = ADC_INPUTCHAN_EXT26,&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;const adc_chan_config_t adConv1_ChnConfig1 = {&lt;BR /&gt;.interruptEnable = false,&lt;BR /&gt;.channel = ADC_INPUTCHAN_EXT26,&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;const adc_chan_config_t adConv1_ChnConfig2 = {&lt;BR /&gt;.interruptEnable = false,&lt;BR /&gt;.channel = ADC_INPUTCHAN_EXT26,&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;const adc_chan_config_t adConv1_ChnConfig3 = {&lt;BR /&gt;.interruptEnable = false,&lt;BR /&gt;.channel = ADC_INPUTCHAN_EXT26,&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;const adc_chan_config_t adConv1_ChnConfig4 = {&lt;BR /&gt;.interruptEnable = false,&lt;BR /&gt;.channel = ADC_INPUTCHAN_EXT26,&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;const adc_chan_config_t adConv1_ChnConfig5 = {&lt;BR /&gt;.interruptEnable = false,&lt;BR /&gt;.channel = ADC_INPUTCHAN_EXT26,&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;const adc_chan_config_t adConv1_ChnConfig6 = {&lt;BR /&gt;.interruptEnable = false,&lt;BR /&gt;.channel = ADC_INPUTCHAN_EXT26,&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;const adc_compare_config_t adConv1_HwCompConfig0 = {&lt;BR /&gt;.compareEnable = false,&lt;BR /&gt;.compareGreaterThanEnable = false,&lt;BR /&gt;.compareRangeFuncEnable = false,&lt;BR /&gt;.compVal1 = 0U,&lt;BR /&gt;.compVal2 = 0U,&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;const adc_average_config_t adConv1_HwAvgConfig0 = {&lt;BR /&gt;.hwAvgEnable = false,&lt;BR /&gt;.hwAverage = ADC_AVERAGE_4,&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Mon, 21 Dec 2020 11:11:37 GMT</pubDate>
    <dc:creator>linglei_meng</dc:creator>
    <dc:date>2020-12-21T11:11:37Z</dc:date>
    <item>
      <title>ADC DMA software trigger</title>
      <link>https://community.nxp.com/t5/S32K/ADC-DMA-software-trigger/m-p/1202461#M9338</link>
      <description>&lt;P&gt;S32K148 -&amp;gt; 144 LQFP&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Hi community&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;while(1)&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; ADC_DRV_ConfigChan(INST_ADCONV1, 0U, &amp;amp;adConv1_ChnConfig0);&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; OS_Sleep(100);&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Example 1 (OK): It Can touch the DMA,&lt;/SPAN&gt;void DMA_ADC1_CHANNEL1(void *parameter, edma_chn_status_t status).&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;while(1)&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; ADC_DRV_ConfigChan(INST_ADCONV1, 3U, &amp;amp;adConv1_ChnConfig0);&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; OS_Sleep(100);&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Example 2(NG): It Cann't touch the DMA,void DMA_ADC1_CHANNEL1(void *parameter, edma_chn_status_t status).&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Could you please help me to see what the problem is&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;#include "dmaController1.h"&lt;/P&gt;&lt;P&gt;edma_state_t dmaController1_State;&lt;/P&gt;&lt;P&gt;edma_chn_state_t dmaController1Chn0_State;&lt;/P&gt;&lt;P&gt;edma_chn_state_t dmaController1Chn1_State;&lt;/P&gt;&lt;P&gt;edma_chn_state_t * const edmaChnStateArray[] = {&lt;BR /&gt;&amp;amp;dmaController1Chn0_State,&lt;BR /&gt;&amp;amp;dmaController1Chn1_State&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;edma_channel_config_t dmaController1Chn0_Config = {&lt;BR /&gt;.channelPriority = EDMA_CHN_DEFAULT_PRIORITY,&lt;BR /&gt;.virtChnConfig = EDMA_CHN0_NUMBER,&lt;BR /&gt;.source = EDMA_REQ_ADC0,&lt;BR /&gt;.callback = DMA_ADC0_CHANNEL0,&lt;BR /&gt;.callbackParam = NULL,&lt;BR /&gt;.enableTrigger = false&lt;BR /&gt;};&lt;BR /&gt;edma_channel_config_t dmaController1Chn1_Config = {&lt;BR /&gt;.channelPriority = EDMA_CHN_DEFAULT_PRIORITY,&lt;BR /&gt;.virtChnConfig = EDMA_CHN1_NUMBER,&lt;BR /&gt;.source = EDMA_REQ_ADC1,&lt;BR /&gt;.callback = DMA_ADC1_CHANNEL1,&lt;BR /&gt;.callbackParam = NULL,&lt;BR /&gt;.enableTrigger = false&lt;BR /&gt;};&lt;BR /&gt;const edma_channel_config_t * const edmaChnConfigArray[] = {&lt;BR /&gt;&amp;amp;dmaController1Chn0_Config,&lt;BR /&gt;&amp;amp;dmaController1Chn1_Config&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;const edma_user_config_t dmaController1_InitConfig0 = {&lt;BR /&gt;.chnArbitration = EDMA_ARBITRATION_FIXED_PRIORITY,&lt;BR /&gt;.haltOnError = false&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;/* END dmaController1. */&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;#include "adConv1.h"&lt;/P&gt;&lt;P&gt;/*! adConv1 configuration structure */&lt;BR /&gt;const adc_converter_config_t adConv1_ConvConfig0 = {&lt;BR /&gt;.clockDivide = ADC_CLK_DIVIDE_1,&lt;BR /&gt;.sampleTime = 13U,&lt;BR /&gt;.resolution = ADC_RESOLUTION_12BIT,&lt;BR /&gt;.inputClock = ADC_CLK_ALT_1,&lt;BR /&gt;.trigger = ADC_TRIGGER_SOFTWARE,&lt;BR /&gt;.pretriggerSel = ADC_PRETRIGGER_SEL_PDB,&lt;BR /&gt;.triggerSel = ADC_TRIGGER_SEL_PDB,&lt;BR /&gt;.dmaEnable = true,&lt;BR /&gt;.voltageRef = ADC_VOLTAGEREF_VREF,&lt;BR /&gt;.continuousConvEnable = false,&lt;BR /&gt;.supplyMonitoringEnable = false,&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;const adc_chan_config_t adConv1_ChnConfig0 = {&lt;BR /&gt;.interruptEnable = false,&lt;BR /&gt;.channel = ADC_INPUTCHAN_EXT26,&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;const adc_chan_config_t adConv1_ChnConfig1 = {&lt;BR /&gt;.interruptEnable = false,&lt;BR /&gt;.channel = ADC_INPUTCHAN_EXT26,&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;const adc_chan_config_t adConv1_ChnConfig2 = {&lt;BR /&gt;.interruptEnable = false,&lt;BR /&gt;.channel = ADC_INPUTCHAN_EXT26,&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;const adc_chan_config_t adConv1_ChnConfig3 = {&lt;BR /&gt;.interruptEnable = false,&lt;BR /&gt;.channel = ADC_INPUTCHAN_EXT26,&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;const adc_chan_config_t adConv1_ChnConfig4 = {&lt;BR /&gt;.interruptEnable = false,&lt;BR /&gt;.channel = ADC_INPUTCHAN_EXT26,&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;const adc_chan_config_t adConv1_ChnConfig5 = {&lt;BR /&gt;.interruptEnable = false,&lt;BR /&gt;.channel = ADC_INPUTCHAN_EXT26,&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;const adc_chan_config_t adConv1_ChnConfig6 = {&lt;BR /&gt;.interruptEnable = false,&lt;BR /&gt;.channel = ADC_INPUTCHAN_EXT26,&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;const adc_compare_config_t adConv1_HwCompConfig0 = {&lt;BR /&gt;.compareEnable = false,&lt;BR /&gt;.compareGreaterThanEnable = false,&lt;BR /&gt;.compareRangeFuncEnable = false,&lt;BR /&gt;.compVal1 = 0U,&lt;BR /&gt;.compVal2 = 0U,&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;const adc_average_config_t adConv1_HwAvgConfig0 = {&lt;BR /&gt;.hwAvgEnable = false,&lt;BR /&gt;.hwAverage = ADC_AVERAGE_4,&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 21 Dec 2020 11:11:37 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/ADC-DMA-software-trigger/m-p/1202461#M9338</guid>
      <dc:creator>linglei_meng</dc:creator>
      <dc:date>2020-12-21T11:11:37Z</dc:date>
    </item>
    <item>
      <title>Re: ADC DMA software trigger</title>
      <link>https://community.nxp.com/t5/S32K/ADC-DMA-software-trigger/m-p/1202733#M9346</link>
      <description>&lt;P&gt;Hi&amp;nbsp;linglei_meng,&lt;/P&gt;
&lt;P&gt;In &lt;STRONG&gt;Software Trigger&lt;/STRONG&gt; mode (when SC2[ADTRG]=0), writes to SC1&lt;STRONG&gt;A&lt;/STRONG&gt; initiate a new conversion.&lt;BR /&gt;None of the SC1&lt;STRONG&gt;B&lt;/STRONG&gt;-SC1&lt;STRONG&gt;n&lt;/STRONG&gt; registers are used for software trigger operation.&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="ADC Status and Control Register 1 (SC1A - aSC1P).png" style="width: 999px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/133216i7DA4EF4177DE50AE/image-size/large?v=v2&amp;amp;px=999" role="button" title="ADC Status and Control Register 1 (SC1A - aSC1P).png" alt="ADC Status and Control Register 1 (SC1A - aSC1P).png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;When using &lt;STRONG&gt;ADC_DRV_ConfigChan&lt;/STRONG&gt; you should notice it: &lt;EM&gt;When Software Trigger mode is enabled, configuring control channel index &lt;STRONG&gt;0&lt;/STRONG&gt;, implicitly triggers a new conversion on the selected ADC input channel.&lt;/EM&gt;&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="ADC_DRV_ConfigChan.png" style="width: 999px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/133217i61DD428FBB5A1B98/image-size/large?v=v2&amp;amp;px=999" role="button" title="ADC_DRV_ConfigChan.png" alt="ADC_DRV_ConfigChan.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;Best Regards,&lt;BR /&gt;Robin&lt;BR /&gt;-------------------------------------------------------------------------------&lt;BR /&gt;Note:&lt;BR /&gt;- If this post answers your question, please click the "Mark Correct" button. Thank you!&lt;/P&gt;
&lt;P&gt;- We are following threads for 7 weeks after the last post, later replies are ignored&lt;BR /&gt;Please open a new thread and refer to the closed one, if you have a related question at a later point in time.&lt;BR /&gt;-------------------------------------------------------------------------------&lt;/P&gt;</description>
      <pubDate>Tue, 22 Dec 2020 03:26:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/ADC-DMA-software-trigger/m-p/1202733#M9346</guid>
      <dc:creator>Robin_Shen</dc:creator>
      <dc:date>2020-12-22T03:26:10Z</dc:date>
    </item>
    <item>
      <title>Re: ADC DMA software trigger</title>
      <link>https://community.nxp.com/t5/S32K/ADC-DMA-software-trigger/m-p/1202796#M9349</link>
      <description>&lt;P&gt;Thank you !&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Your reply is very helpful to me, and the question reply is accurate and effective.&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Tue, 22 Dec 2020 05:45:27 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/ADC-DMA-software-trigger/m-p/1202796#M9349</guid>
      <dc:creator>linglei_meng</dc:creator>
      <dc:date>2020-12-22T05:45:27Z</dc:date>
    </item>
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