<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>S32KのトピックRe: Communicating with SPI slave driver without using ChipSelect pin</title>
    <link>https://community.nxp.com/t5/S32K/Communicating-with-SPI-slave-driver-without-using-ChipSelect-pin/m-p/1188121#M8971</link>
    <description>&lt;P&gt;Hi Daniel&lt;/P&gt;&lt;P&gt;Thanks for sharing the insights.&lt;/P&gt;&lt;P&gt;Would like to understand, how the below configuration can be synchronized w.r.t master data.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="jaikumar81_0-1606215163481.png" style="width: 594px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/130849iE1F31D46195782F7/image-dimensions/594x49?v=v2" width="594" height="49" role="button" title="jaikumar81_0-1606215163481.png" alt="jaikumar81_0-1606215163481.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;Kindky share your&amp;nbsp; inputs.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Jayakumar Appari&lt;/P&gt;</description>
    <pubDate>Tue, 24 Nov 2020 11:02:20 GMT</pubDate>
    <dc:creator>jaikumar81</dc:creator>
    <dc:date>2020-11-24T11:02:20Z</dc:date>
    <item>
      <title>Communicating with SPI slave driver without using ChipSelect pin</title>
      <link>https://community.nxp.com/t5/S32K/Communicating-with-SPI-slave-driver-without-using-ChipSelect-pin/m-p/1186526#M8914</link>
      <description>&lt;P&gt;Hello&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;We are using custom board&amp;nbsp; S32k148-100 pin for our development activities.&lt;/P&gt;&lt;P&gt;We have a communication requirement to communicate with SPI master(on another chip- exeynos) with SPI slave on S32k148.&lt;/P&gt;&lt;P&gt;We notice that, master is always setting CS(chip select) Pin as high due to which, we are unable to receive any changes on the SPI slave i.e the DMA configured on SPI slave has not triggering DMA complete call back. While on the SPI master (from exeynos) we could see Master clock with 500kbps and data on MOSI line too.&lt;/P&gt;&lt;P&gt;Could you please share the application and changes in the driver required&amp;nbsp; so that LPSPI&amp;nbsp; slave communicates with SPI Master with SPI Slave 3 pins(MOSI, MISO and Clock).&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Jayakumar Appari&lt;/P&gt;</description>
      <pubDate>Fri, 20 Nov 2020 07:53:31 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/Communicating-with-SPI-slave-driver-without-using-ChipSelect-pin/m-p/1186526#M8914</guid>
      <dc:creator>jaikumar81</dc:creator>
      <dc:date>2020-11-20T07:53:31Z</dc:date>
    </item>
    <item>
      <title>Re: Communicating with SPI slave driver without using ChipSelect pin</title>
      <link>https://community.nxp.com/t5/S32K/Communicating-with-SPI-slave-driver-without-using-ChipSelect-pin/m-p/1187456#M8956</link>
      <description>&lt;P&gt;Hi Jayakumar,&lt;/P&gt;
&lt;P&gt;The LPSPI module can work as a Slave without PCS if the CFGR1[AUTOPCS] is set.&lt;/P&gt;
&lt;P&gt;It has some restrictions as you can see in this description:&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="danielmartynek_0-1606132446739.png" style="width: 670px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/130765i89B9469183B23DA5/image-dimensions/670x181?v=v2" width="670" height="181" role="button" title="danielmartynek_0-1606132446739.png" alt="danielmartynek_0-1606132446739.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;BR, Daniel&lt;/P&gt;</description>
      <pubDate>Mon, 23 Nov 2020 11:54:37 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/Communicating-with-SPI-slave-driver-without-using-ChipSelect-pin/m-p/1187456#M8956</guid>
      <dc:creator>danielmartynek</dc:creator>
      <dc:date>2020-11-23T11:54:37Z</dc:date>
    </item>
    <item>
      <title>Re: Communicating with SPI slave driver without using ChipSelect pin</title>
      <link>https://community.nxp.com/t5/S32K/Communicating-with-SPI-slave-driver-without-using-ChipSelect-pin/m-p/1188121#M8971</link>
      <description>&lt;P&gt;Hi Daniel&lt;/P&gt;&lt;P&gt;Thanks for sharing the insights.&lt;/P&gt;&lt;P&gt;Would like to understand, how the below configuration can be synchronized w.r.t master data.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="jaikumar81_0-1606215163481.png" style="width: 594px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/130849iE1F31D46195782F7/image-dimensions/594x49?v=v2" width="594" height="49" role="button" title="jaikumar81_0-1606215163481.png" alt="jaikumar81_0-1606215163481.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;Kindky share your&amp;nbsp; inputs.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Jayakumar Appari&lt;/P&gt;</description>
      <pubDate>Tue, 24 Nov 2020 11:02:20 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/Communicating-with-SPI-slave-driver-without-using-ChipSelect-pin/m-p/1188121#M8971</guid>
      <dc:creator>jaikumar81</dc:creator>
      <dc:date>2020-11-24T11:02:20Z</dc:date>
    </item>
    <item>
      <title>Re: Communicating with SPI slave driver without using ChipSelect pin</title>
      <link>https://community.nxp.com/t5/S32K/Communicating-with-SPI-slave-driver-without-using-ChipSelect-pin/m-p/1188907#M9002</link>
      <description>&lt;P&gt;Hi Jayakumar&lt;/P&gt;
&lt;P&gt;You need to configure the master to have the required delay, at least 4 cycles of the prescaled functional clock&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Daniel&lt;/P&gt;</description>
      <pubDate>Wed, 25 Nov 2020 11:16:18 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/Communicating-with-SPI-slave-driver-without-using-ChipSelect-pin/m-p/1188907#M9002</guid>
      <dc:creator>danielmartynek</dc:creator>
      <dc:date>2020-11-25T11:16:18Z</dc:date>
    </item>
    <item>
      <title>Re: Communicating with SPI slave driver without using ChipSelect pin</title>
      <link>https://community.nxp.com/t5/S32K/Communicating-with-SPI-slave-driver-without-using-ChipSelect-pin/m-p/1192307#M9081</link>
      <description>&lt;P&gt;Thanks Daniel.&lt;/P&gt;</description>
      <pubDate>Wed, 02 Dec 2020 11:24:12 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/Communicating-with-SPI-slave-driver-without-using-ChipSelect-pin/m-p/1192307#M9081</guid>
      <dc:creator>jaikumar81</dc:creator>
      <dc:date>2020-12-02T11:24:12Z</dc:date>
    </item>
  </channel>
</rss>

