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    <title>S32KのトピックRe: On S32K148 DFLASH read after program is wrong</title>
    <link>https://community.nxp.com/t5/S32K/On-S32K148-DFLASH-read-after-program-is-wrong/m-p/1180311#M8744</link>
    <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Flash speculation seems being enabled by default. OCM1 field of OCMDR1 is 00 by default. Tricky note "Value 0 means enable", Enable-Enable, so both instruction and data speculation are enabled.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Edward&lt;/P&gt;</description>
    <pubDate>Mon, 09 Nov 2020 20:41:43 GMT</pubDate>
    <dc:creator>kef2</dc:creator>
    <dc:date>2020-11-09T20:41:43Z</dc:date>
    <item>
      <title>On S32K148 DFLASH read after program is wrong</title>
      <link>https://community.nxp.com/t5/S32K/On-S32K148-DFLASH-read-after-program-is-wrong/m-p/1177619#M8681</link>
      <description>&lt;P&gt;I've ported a file system (LittleFS) to my system. It's configured to program blocks of up to 64 bytes using the SDK flash program function. The block read is done by direct memory access.&lt;BR /&gt;The file system after programming a block reads it back and verifies it. Many times the verify fails. Any idea why?&lt;BR /&gt;&lt;BR /&gt;Freddy&lt;/P&gt;</description>
      <pubDate>Wed, 04 Nov 2020 02:30:35 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/On-S32K148-DFLASH-read-after-program-is-wrong/m-p/1177619#M8681</guid>
      <dc:creator>freddy_ben-zeev</dc:creator>
      <dc:date>2020-11-04T02:30:35Z</dc:date>
    </item>
    <item>
      <title>Re: On S32K148 DFLASH read after program is wrong</title>
      <link>https://community.nxp.com/t5/S32K/On-S32K148-DFLASH-read-after-program-is-wrong/m-p/1177900#M8687</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;
&lt;P&gt;some typical troubles when programming the flash:&lt;/P&gt;
&lt;P&gt;- do you check return value of FLASH_DRV_Program function? Is it always STATUS_SUCCESS?&lt;/P&gt;
&lt;P&gt;- are you aware that flash start address and size must be aligned to 8 bytes?&lt;/P&gt;
&lt;P&gt;- from RM: "A Flash memory location must be in the erased state before&lt;BR /&gt;being programmed. Cumulative programming of bits (back-to-&lt;BR /&gt;back program operations without an intervening erase) within a&lt;BR /&gt;Flash memory location is not allowed. Re-programming of&lt;BR /&gt;existing 0s to 0 is not allowed as this overstresses the device."&lt;/P&gt;
&lt;P&gt;These are first things to check. More details would be needed if this doesn't help.&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Lukas&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 04 Nov 2020 11:01:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/On-S32K148-DFLASH-read-after-program-is-wrong/m-p/1177900#M8687</guid>
      <dc:creator>lukaszadrapa</dc:creator>
      <dc:date>2020-11-04T11:01:50Z</dc:date>
    </item>
    <item>
      <title>Re: On S32K148 DFLASH read after program is wrong</title>
      <link>https://community.nxp.com/t5/S32K/On-S32K148-DFLASH-read-after-program-is-wrong/m-p/1178206#M8694</link>
      <description>&lt;P&gt;All those issues were verified.&lt;BR /&gt;&lt;BR /&gt;Another interesting point:&lt;BR /&gt;1. I'm running under the design studio debugger.&lt;BR /&gt;2. I set a breakpoint where the read back verification fails and run until I get there.&lt;BR /&gt;3. I examine the flash with the debugger - it is correct.&lt;BR /&gt;4. I force the code to re-execute the verification - it passes.&lt;BR /&gt;5. If I execute the verify multiple times in a loop without break point it fails for as many time as I execute the loop (tried 100 times).&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 04 Nov 2020 19:45:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/On-S32K148-DFLASH-read-after-program-is-wrong/m-p/1178206#M8694</guid>
      <dc:creator>freddy_ben-zeev</dc:creator>
      <dc:date>2020-11-04T19:45:01Z</dc:date>
    </item>
    <item>
      <title>Re: On S32K148 DFLASH read after program is wrong</title>
      <link>https://community.nxp.com/t5/S32K/On-S32K148-DFLASH-read-after-program-is-wrong/m-p/1178334#M8695</link>
      <description>&lt;P&gt;More information:&lt;BR /&gt;&lt;BR /&gt;The software programs the DFLASH as blocks of 64-bytes (aligned on 8 bytes boundary). After such a write it uses memcpy to read back the last written block to a RAM buffer. When the problem happens this read back buffer has 8 FF's in the first 8 bytes (the rest of the buffer is correct). The flash from where is was read seems to have the correct data.&lt;BR /&gt;I've added after the memcpy a memcmp between the read back buffer and the DFLASH to check if the data was copied correctly - and the problem disappeared.&lt;BR /&gt;I don't like such unexplained situations...&lt;BR /&gt;&lt;BR /&gt;Freddy&lt;/P&gt;</description>
      <pubDate>Wed, 04 Nov 2020 23:57:49 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/On-S32K148-DFLASH-read-after-program-is-wrong/m-p/1178334#M8695</guid>
      <dc:creator>freddy_ben-zeev</dc:creator>
      <dc:date>2020-11-04T23:57:49Z</dc:date>
    </item>
    <item>
      <title>Re: On S32K148 DFLASH read after program is wrong</title>
      <link>https://community.nxp.com/t5/S32K/On-S32K148-DFLASH-read-after-program-is-wrong/m-p/1179911#M8725</link>
      <description>&lt;P&gt;Hi Freddy,&lt;/P&gt;
&lt;P&gt;could you try to disable cache memory to see if it makes a difference?&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Lukas&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 09 Nov 2020 07:14:29 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/On-S32K148-DFLASH-read-after-program-is-wrong/m-p/1179911#M8725</guid>
      <dc:creator>lukaszadrapa</dc:creator>
      <dc:date>2020-11-09T07:14:29Z</dc:date>
    </item>
    <item>
      <title>Re: On S32K148 DFLASH read after program is wrong</title>
      <link>https://community.nxp.com/t5/S32K/On-S32K148-DFLASH-read-after-program-is-wrong/m-p/1180301#M8743</link>
      <description>&lt;P&gt;The cache was not enabled. PCCCR is 0.&lt;/P&gt;</description>
      <pubDate>Mon, 09 Nov 2020 19:50:59 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/On-S32K148-DFLASH-read-after-program-is-wrong/m-p/1180301#M8743</guid>
      <dc:creator>freddy_ben-zeev</dc:creator>
      <dc:date>2020-11-09T19:50:59Z</dc:date>
    </item>
    <item>
      <title>Re: On S32K148 DFLASH read after program is wrong</title>
      <link>https://community.nxp.com/t5/S32K/On-S32K148-DFLASH-read-after-program-is-wrong/m-p/1180311#M8744</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Flash speculation seems being enabled by default. OCM1 field of OCMDR1 is 00 by default. Tricky note "Value 0 means enable", Enable-Enable, so both instruction and data speculation are enabled.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Edward&lt;/P&gt;</description>
      <pubDate>Mon, 09 Nov 2020 20:41:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/On-S32K148-DFLASH-read-after-program-is-wrong/m-p/1180311#M8744</guid>
      <dc:creator>kef2</dc:creator>
      <dc:date>2020-11-09T20:41:43Z</dc:date>
    </item>
    <item>
      <title>Re: On S32K148 DFLASH read after program is wrong</title>
      <link>https://community.nxp.com/t5/S32K/On-S32K148-DFLASH-read-after-program-is-wrong/m-p/1181641#M8781</link>
      <description>&lt;P&gt;Setting bit 4 in OCMDR[1] to '1' solved the issue.&lt;/P&gt;&lt;P&gt;Thanks.&lt;/P&gt;</description>
      <pubDate>Wed, 11 Nov 2020 18:56:44 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/On-S32K148-DFLASH-read-after-program-is-wrong/m-p/1181641#M8781</guid>
      <dc:creator>freddy_ben-zeev</dc:creator>
      <dc:date>2020-11-11T18:56:44Z</dc:date>
    </item>
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