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    <title>topic Re: ADC with PDB Triggering Question S32k144 in S32K</title>
    <link>https://community.nxp.com/t5/S32K/ADC-with-PDB-Triggering-Question-S32k144/m-p/1082704#M7700</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;you cannot trigger ADC by PDB without reading ADC results. Words from the RM...&lt;/P&gt;&lt;P&gt;"When a pre-trigger from a PDB channel n is asserted, the associated lock of the pre-trigger becomes active. The associated lock is released by the rising edge of the corresponding ADCnSC1[COCO]; the ADCnSC1[COCO] should be cleared after the conversion result is read, so that the next rising edge of ADCnSC1[COCO] can be generated to clear the lock later."&lt;/P&gt;&lt;P&gt;1) to do not operate with interrupt or polling flag the DMA usage is advisable&lt;/P&gt;&lt;P&gt;2-3) you can refer to&amp;nbsp;&lt;A href="https://community.nxp.com/docs/DOC-333054"&gt;Example S32K144 PDB ADC trigger DMA ISR S32DS&lt;/A&gt;&amp;nbsp;or SDK based example&lt;A href="https://community.nxp.com/docs/DOC-343295"&gt;https://community.nxp.com/docs/DOC-343295&lt;/A&gt;&amp;nbsp;.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;BR, Petr&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Fri, 24 Jul 2020 07:33:11 GMT</pubDate>
    <dc:creator>PetrS</dc:creator>
    <dc:date>2020-07-24T07:33:11Z</dc:date>
    <item>
      <title>ADC with PDB Triggering Question S32k144</title>
      <link>https://community.nxp.com/t5/S32K/ADC-with-PDB-Triggering-Question-S32k144/m-p/1082703#M7699</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;I am using S32k144 and i want to configure ADC to be triggered with PDB timer which got triggered with TriggerMux.&lt;/P&gt;&lt;P&gt;I want to use ADC without polling for the COCO flag, and without interrupts also, just a timer triggers pdb timer which triggers.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have some questions:&lt;/P&gt;&lt;P&gt;1- To be able to do that, is it mandatory to configure ADC to work with DMA?&lt;/P&gt;&lt;P&gt;2- If not, am i getting the idea right? if yes, how should the configuration process go?&lt;/P&gt;&lt;P&gt;3- Is there an example for that?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;That's for now, appreciate your kind support.&lt;/P&gt;&lt;P&gt;Thank you.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 23 Jul 2020 20:38:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/ADC-with-PDB-Triggering-Question-S32k144/m-p/1082703#M7699</guid>
      <dc:creator>marwanibrahim</dc:creator>
      <dc:date>2020-07-23T20:38:53Z</dc:date>
    </item>
    <item>
      <title>Re: ADC with PDB Triggering Question S32k144</title>
      <link>https://community.nxp.com/t5/S32K/ADC-with-PDB-Triggering-Question-S32k144/m-p/1082704#M7700</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;you cannot trigger ADC by PDB without reading ADC results. Words from the RM...&lt;/P&gt;&lt;P&gt;"When a pre-trigger from a PDB channel n is asserted, the associated lock of the pre-trigger becomes active. The associated lock is released by the rising edge of the corresponding ADCnSC1[COCO]; the ADCnSC1[COCO] should be cleared after the conversion result is read, so that the next rising edge of ADCnSC1[COCO] can be generated to clear the lock later."&lt;/P&gt;&lt;P&gt;1) to do not operate with interrupt or polling flag the DMA usage is advisable&lt;/P&gt;&lt;P&gt;2-3) you can refer to&amp;nbsp;&lt;A href="https://community.nxp.com/docs/DOC-333054"&gt;Example S32K144 PDB ADC trigger DMA ISR S32DS&lt;/A&gt;&amp;nbsp;or SDK based example&lt;A href="https://community.nxp.com/docs/DOC-343295"&gt;https://community.nxp.com/docs/DOC-343295&lt;/A&gt;&amp;nbsp;.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;BR, Petr&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 24 Jul 2020 07:33:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/ADC-with-PDB-Triggering-Question-S32k144/m-p/1082704#M7700</guid>
      <dc:creator>PetrS</dc:creator>
      <dc:date>2020-07-24T07:33:11Z</dc:date>
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