topic Re: EEEPROM ECC in S32K

EEEPROM ECC

814420552 — Sat, 13 Jun 2020 08:05:35 GMT

hello

<1>when S32K146 data flash partitioned to EEPROM and ECC check EEPROM single-bit error and double-bit error ,

all the error will have an interrupt if enabled? whether can i get the error address for ECC error when ECC working on EEPROM?

Even if we can get these ECC error addresses, it seems that our users can't do anything to fix the errors. In this way, it feels that this ECC detects 2 bit errors. It does not seem to be useful except for automatically fixing 1 bit errors.

<2> How do you understand the following paragraph with red lines?

wish your help

thanks

Re: EEEPROM ECC

danielmartynek — Tue, 16 Jun 2020 08:49:51 GMT

Hello 814420552@qq.com,

The EEPROM backup flash is managed by the EEPROM state machine, the user does not have access to it.

When ECC errors are detected in the backup flash, no interrupt is generated.

However,

any single-bit ECC errors are automatically corrected when the data are loaded from the backup flash to FlexRAM (EEPROM).

Data that cannot be automatically corrected (uncorrectable double-bit ECC errors) are left as all 1s in FlexRAM.

Regards,

Daniel

Re: EEEPROM ECC

814420552 — Tue, 16 Jun 2020 10:03:41 GMT

hello，

as the following picture description, which interrupt source supported by EEPROM used?

and when does the read collision Error generate?

wish your help!

Re: EEEPROM ECC

danielmartynek — Wed, 17 Jun 2020 12:25:12 GMT

Hello 814420552@qq.com,

The DFDIF flag is not available for the EEPROM, but the other two are available.

The FTFC module detects a read collision, when the MCU attempts to read from an FTFC resource (block) that is
being manipulated by an FTFC command (CCIF=0).

Regards,

Daniel

Re: EEEPROM ECC

814420552 — Thu, 18 Jun 2020 12:01:04 GMT

hello Daniel,

firstly thanks for you answer quickly! wish you good luck!

and I have anther question is as the follow

how to understand the following Red frame description and when and where will we use this function ？

in fact i am confused with this sentence！

Re: EEEPROM ECC

danielmartynek — Thu, 18 Jun 2020 12:18:12 GMT

Hello 814420552@qq.com,

The FDFD allows emulating uncorrectable double-bit ECC error detection on the flash.

When FDFD = 1, any read from the flash will set the DFDIF flag as if there was a double bit ECC error.

Regards,

Daniel

Re: EEEPROM ECC

814420552 — Tue, 21 Jul 2020 03:58:25 GMT

hello，

in S32K-SafetyMannual, as the following description, EEPROM has ECC interupt source?

this is inconsistent with what you said before that there is no ECC interruption.

Re: EEEPROM ECC

danielmartynek — Tue, 27 Oct 2020 12:11:56 GMT

Hello,

I'm sorry for the delay.

The safety manual will be corrected in the next revision.

This applies only to PFlash and DFlash on S32K1xx with the FTFC module.

Regards,

Daniel