<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>S32K中的主题 S32K148 - interrupts disable/enable</title>
    <link>https://community.nxp.com/t5/S32K/S32K148-interrupts-disable-enable/m-p/1041348#M6724</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Assume I have following code sequence:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;1. disable_interrupts()&lt;/P&gt;&lt;P&gt;2. some code&lt;/P&gt;&lt;P&gt;3. disable_interrupts()&lt;/P&gt;&lt;P&gt;4. some code&lt;/P&gt;&lt;P&gt;5. enable_interrupts()&lt;/P&gt;&lt;P&gt;6. some code&lt;/P&gt;&lt;P&gt;7. enable_interrupts()&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;disable_interrupts() is done by __asm("cpsid i")&lt;/P&gt;&lt;P&gt;enable_interrupts() is done by __asm("cpsie i")&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;When will interrupts become enabled back in the above sequence, at 5. or at 7.? Does S32K148 keep track of nested "cpsid" and "cpsie"?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Kind regards,&lt;/P&gt;&lt;P&gt;Jakub&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 29 Jul 2020 14:09:00 GMT</pubDate>
    <dc:creator>jakub_mielczare</dc:creator>
    <dc:date>2020-07-29T14:09:00Z</dc:date>
    <item>
      <title>S32K148 - interrupts disable/enable</title>
      <link>https://community.nxp.com/t5/S32K/S32K148-interrupts-disable-enable/m-p/1041348#M6724</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Assume I have following code sequence:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;1. disable_interrupts()&lt;/P&gt;&lt;P&gt;2. some code&lt;/P&gt;&lt;P&gt;3. disable_interrupts()&lt;/P&gt;&lt;P&gt;4. some code&lt;/P&gt;&lt;P&gt;5. enable_interrupts()&lt;/P&gt;&lt;P&gt;6. some code&lt;/P&gt;&lt;P&gt;7. enable_interrupts()&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;disable_interrupts() is done by __asm("cpsid i")&lt;/P&gt;&lt;P&gt;enable_interrupts() is done by __asm("cpsie i")&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;When will interrupts become enabled back in the above sequence, at 5. or at 7.? Does S32K148 keep track of nested "cpsid" and "cpsie"?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Kind regards,&lt;/P&gt;&lt;P&gt;Jakub&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 29 Jul 2020 14:09:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K148-interrupts-disable-enable/m-p/1041348#M6724</guid>
      <dc:creator>jakub_mielczare</dc:creator>
      <dc:date>2020-07-29T14:09:00Z</dc:date>
    </item>
    <item>
      <title>Re: S32K148 - interrupts disable/enable</title>
      <link>https://community.nxp.com/t5/S32K/S32K148-interrupts-disable-enable/m-p/1041349#M6725</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;CPS Instructions in the ARMv7-M architecture directly influence PRIMASK and FAULTMASK registers. No nesting is performed.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;See also &lt;A href="https://static.docs.arm.com/ddi0403/e/DDI0403E_B_armv7m_arm.pdf#G17.4949689"&gt;ARMv7-M reference manual section B5.2.1&lt;/A&gt;.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 29 Jul 2020 14:31:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K148-interrupts-disable-enable/m-p/1041349#M6725</guid>
      <dc:creator>Joey_van_Hummel</dc:creator>
      <dc:date>2020-07-29T14:31:53Z</dc:date>
    </item>
    <item>
      <title>Re: S32K148 - interrupts disable/enable</title>
      <link>https://community.nxp.com/t5/S32K/S32K148-interrupts-disable-enable/m-p/1041350#M6726</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thank you.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Is it safe to call those instructions from ISR?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 30 Jul 2020 13:52:55 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K148-interrupts-disable-enable/m-p/1041350#M6726</guid>
      <dc:creator>jakub_mielczare</dc:creator>
      <dc:date>2020-07-30T13:52:55Z</dc:date>
    </item>
    <item>
      <title>Re: S32K148 - interrupts disable/enable</title>
      <link>https://community.nxp.com/t5/S32K/S32K148-interrupts-disable-enable/m-p/1041351#M6727</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;It's safe in the sense that the documentation doesn't state not to do it.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;If you want to enable interrupt nesting, calling CPSIE inside the ISR (like you would on an S12X) is not the way to go, since PRIMASK and FAULTMASK are&amp;nbsp; unchanged upon exception entry. It won't have any effect. You can make use of the priority levels. Higher priority exceptions can interrupt lower priority exceptions.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;If you want to prevent interrupts from interrupting your ISR, you can safely call CPSID and then re-enable with CPSIE when you're done.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 30 Jul 2020 21:16:18 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K148-interrupts-disable-enable/m-p/1041351#M6727</guid>
      <dc:creator>Joey_van_Hummel</dc:creator>
      <dc:date>2020-07-30T21:16:18Z</dc:date>
    </item>
  </channel>
</rss>

