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    <title>topic Re: S32K144 CAN Bus Masking And Filtering? in S32K</title>
    <link>https://community.nxp.com/t5/S32K/S32K144-CAN-Bus-Masking-And-Filtering/m-p/1031328#M6526</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thanks for this image, I completely understood this.&lt;BR /&gt;I just have one confusion,&amp;nbsp;&lt;BR /&gt;Kindly take a reference of S32K-RM pdf&lt;/P&gt;&lt;P&gt;Page No- 1847&lt;/P&gt;&lt;P&gt;------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;55.4.2.18.2 Function&lt;BR /&gt;The RX Individual Mask Registers are used to store the acceptance masks for ID filtering&lt;BR /&gt;in Rx MBs and the Rx FIFO.&lt;BR /&gt;When the Rx FIFO is disabled (MCR[RFEN] bit is negated), an individual mask is&lt;BR /&gt;provided for each available Rx mailbox on a one-to-one correspondence. When the Rx&lt;BR /&gt;FIFO is enabled (MCR[RFEN] bit is asserted), an individual mask is provided for each&lt;BR /&gt;Rx FIFO ID filter table element on a one-to-one correspondence depending on the setting&lt;BR /&gt;of CTRL2[RFFN] (see Rx FIFO).&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;If Rx FIFO is enabled with 10 filter elements, RXIMR0-9 will have one-to-one correspondence with&amp;nbsp; RXFIFO filter elements. But,&amp;nbsp;what about &lt;SPAN&gt;RXIMR10-31&lt;/SPAN&gt;? Will RXIMR20 still correspond to MB20 when the RXFIFO is enabled? &lt;A class="jx-jive-macro-user" href="https://community.nxp.com/people/PetrS"&gt;PetrS&lt;/A&gt;‌&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 02 Apr 2020 10:51:00 GMT</pubDate>
    <dc:creator>shivamshankarg</dc:creator>
    <dc:date>2020-04-02T10:51:00Z</dc:date>
    <item>
      <title>S32K144 CAN Bus Masking And Filtering?</title>
      <link>https://community.nxp.com/t5/S32K/S32K144-CAN-Bus-Masking-And-Filtering/m-p/1031320#M6518</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I want to communicate with many S32K144EVB through FlexCAN. I found a main.c file in which they have done the same thing, but i am not able to understand why he took&lt;/P&gt;&lt;P&gt;/*-----------ID Filter table-----------------*/&lt;/P&gt;&lt;P&gt;flexcan_id_table_t filterTable[16]={};&lt;BR /&gt;uint16_t IDlist[16] = {0x402,0x403,0x404,0x408,0x410,0x420,0x430,0x440,0x448,0x449,0x44A,0x44B,0x44C,0x44F,0x450,0};&lt;BR /&gt;uint16_t IDmask[10] = {0x7FF,0x7FF,0x7FC,0x7F8,0x7F0,0x7F0,0x7F0,0x7F8,0x7FF,0x7FF};&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;means he took filter array having 16 filter id, but the masking array only&amp;nbsp;RXIMR0-RXIMR9&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;please assist me. &lt;BR /&gt;we have RXIMR0-RXIMR63, so why should we didn`t use 16 for 16 filter id.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;PS:- Also attaching main.c file for the reference.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sat, 28 Mar 2020 10:58:37 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K144-CAN-Bus-Masking-And-Filtering/m-p/1031320#M6518</guid>
      <dc:creator>shivamshankarg</dc:creator>
      <dc:date>2020-03-28T10:58:37Z</dc:date>
    </item>
    <item>
      <title>Re: S32K144 CAN Bus Masking And Filtering?</title>
      <link>https://community.nxp.com/t5/S32K/S32K144-CAN-Bus-Masking-And-Filtering/m-p/1031321#M6519</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;below table gives a summary how many ID filter Table elements are affected by RXIMR and RXFGMASK registers.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_1.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/103927iD0F89FDF88DE165B/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_1.png" alt="pastedImage_1.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;So if 16 filter elements are selected then first 10 are affected by individual mask registers RXIMR0-RXIMR9 and teh rest by RX|FIFO global mask RXFGMASK.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;BB, Petr&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 30 Mar 2020 11:29:55 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K144-CAN-Bus-Masking-And-Filtering/m-p/1031321#M6519</guid>
      <dc:creator>PetrS</dc:creator>
      <dc:date>2020-03-30T11:29:55Z</dc:date>
    </item>
    <item>
      <title>Re: S32K144 CAN Bus Masking And Filtering?</title>
      <link>https://community.nxp.com/t5/S32K/S32K144-CAN-Bus-Masking-And-Filtering/m-p/1031322#M6520</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;flexcan_id_table_t filterTable[16]={};&lt;/SPAN&gt;&lt;BR style="color: #51626f; background-color: #ffffff;" /&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;uint16_t IDlist[16] = {0x402,0x403,0x404,0x408,0x410,0x420,0x430,0x440,0x448,0x449,0x44A,0x44B,0x44C,0x44F,0x450,0};&lt;/SPAN&gt;&lt;BR style="color: #51626f; background-color: #ffffff;" /&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;uint16_t IDmask[10] = {0x7FF,0x7FF,0x7FC,0x7F8,0x7F0,0x7F0,0x7F0,0x7F8,0x7FF,0x7FF};&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;My another doubt is why we are taking&amp;nbsp;&lt;SPAN&gt;0x7FC,0x7F8,0x7F0,0x7F0,0x7F0,0x7F8 in IDmask we should take all with 0x7FF?&lt;BR /&gt;I am not getting this.&amp;nbsp;&lt;A class="jx-jive-macro-user" href="https://community.nxp.com/people/PetrS"&gt;PetrS&lt;/A&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 31 Mar 2020 06:20:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K144-CAN-Bus-Masking-And-Filtering/m-p/1031322#M6520</guid>
      <dc:creator>shivamshankarg</dc:creator>
      <dc:date>2020-03-31T06:20:48Z</dc:date>
    </item>
    <item>
      <title>Re: S32K144 CAN Bus Masking And Filtering?</title>
      <link>https://community.nxp.com/t5/S32K/S32K144-CAN-Bus-Masking-And-Filtering/m-p/1031323#M6521</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;ID ranges are used, so less number of ID elements is needed. For example&lt;/P&gt;&lt;P&gt;0x404 is masked with 0x7FC thus lower 2 bits are don't care, so messages with ID 0x404-0x407 are received&lt;/P&gt;&lt;P&gt;0x420 is masked with 0x7F0&amp;nbsp;&lt;SPAN&gt;thus lower 4 bits are don't care, so messages with ID 0x420-0x42F are received&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;and so on&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;BR, Petr&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 31 Mar 2020 07:57:06 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K144-CAN-Bus-Masking-And-Filtering/m-p/1031323#M6521</guid>
      <dc:creator>PetrS</dc:creator>
      <dc:date>2020-03-31T07:57:06Z</dc:date>
    </item>
    <item>
      <title>Re: S32K144 CAN Bus Masking And Filtering?</title>
      <link>https://community.nxp.com/t5/S32K/S32K144-CAN-Bus-Masking-And-Filtering/m-p/1031324#M6522</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;Thanks for this detail, i understood this point but just a last query, how did you/ (or the MCU will know) find which ID is masked with whom?&lt;/P&gt;&lt;P&gt;like 0x404 is masked with 0x7FC and 0x420 is masked with 0x7F0 so, 0x450 is masked with whom?&lt;BR /&gt;&lt;A class="jx-jive-macro-user" href="https://community.nxp.com/people/PetrS"&gt;PetrS&lt;/A&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 31 Mar 2020 08:38:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K144-CAN-Bus-Masking-And-Filtering/m-p/1031324#M6522</guid>
      <dc:creator>shivamshankarg</dc:creator>
      <dc:date>2020-03-31T08:38:46Z</dc:date>
    </item>
    <item>
      <title>Re: S32K144 CAN Bus Masking And Filtering?</title>
      <link>https://community.nxp.com/t5/S32K/S32K144-CAN-Bus-Masking-And-Filtering/m-p/1031325#M6523</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;from the chapter 55.4.2.18.2 of the RM&lt;/P&gt;&lt;P&gt;&lt;EM&gt;When the Rx FIFO is enabled (MCR[RFEN] bit is asserted), an individual mask is provided for each Rx FIFO ID filter table element on a one-to-one correspondence depending on the setting of CTRL2[RFFN] (see Rx FIFO).&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;RXIMR0 stores the individual mask associated with either MB0 or ID filter table element 0, RXIMR1 stores the individual mask associated with either MB1 or ID filter table element 1, and so on.&lt;/EM&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;And in a code IDmask[x] is assigned to RXIMRx register,where x is integer in range 0 to 9.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;BR, Petr&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 31 Mar 2020 10:51:58 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K144-CAN-Bus-Masking-And-Filtering/m-p/1031325#M6523</guid>
      <dc:creator>PetrS</dc:creator>
      <dc:date>2020-03-31T10:51:58Z</dc:date>
    </item>
    <item>
      <title>Re: S32K144 CAN Bus Masking And Filtering?</title>
      <link>https://community.nxp.com/t5/S32K/S32K144-CAN-Bus-Masking-And-Filtering/m-p/1031326#M6524</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;A class="jx-jive-macro-user" href="https://community.nxp.com/people/PetrS"&gt;PetrS&lt;/A&gt;‌&lt;/P&gt;&lt;P&gt;so that means&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;0x402&amp;nbsp;&amp;nbsp;&lt;SPAN&gt;0x7FF&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;0x403&amp;nbsp;&amp;nbsp;&lt;SPAN&gt;0x7FF&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;0x404&amp;nbsp;&lt;SPAN&gt;0x7FC&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;0x408&amp;nbsp;&amp;nbsp;&lt;SPAN&gt;0x7F8&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;0x410&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;0x420&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;0x430&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;0x440&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;0x448,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;0x449,&amp;nbsp;&lt;SPAN&gt;0x7FF and so on till 0x449&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;&lt;SPAN&gt;so what about below ID.&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;0x44A,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;0x44B,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;0x44C,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;0x44F,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;0x450,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;0&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 02 Apr 2020 06:17:26 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K144-CAN-Bus-Masking-And-Filtering/m-p/1031326#M6524</guid>
      <dc:creator>shivamshankarg</dc:creator>
      <dc:date>2020-04-02T06:17:26Z</dc:date>
    </item>
    <item>
      <title>Re: S32K144 CAN Bus Masking And Filtering?</title>
      <link>https://community.nxp.com/t5/S32K/S32K144-CAN-Bus-Masking-And-Filtering/m-p/1031327#M6525</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_1.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/101005i4FD07F7F2ED42DA4/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_1.png" alt="pastedImage_1.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;BR, Petr&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 02 Apr 2020 08:48:49 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K144-CAN-Bus-Masking-And-Filtering/m-p/1031327#M6525</guid>
      <dc:creator>PetrS</dc:creator>
      <dc:date>2020-04-02T08:48:49Z</dc:date>
    </item>
    <item>
      <title>Re: S32K144 CAN Bus Masking And Filtering?</title>
      <link>https://community.nxp.com/t5/S32K/S32K144-CAN-Bus-Masking-And-Filtering/m-p/1031328#M6526</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thanks for this image, I completely understood this.&lt;BR /&gt;I just have one confusion,&amp;nbsp;&lt;BR /&gt;Kindly take a reference of S32K-RM pdf&lt;/P&gt;&lt;P&gt;Page No- 1847&lt;/P&gt;&lt;P&gt;------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;55.4.2.18.2 Function&lt;BR /&gt;The RX Individual Mask Registers are used to store the acceptance masks for ID filtering&lt;BR /&gt;in Rx MBs and the Rx FIFO.&lt;BR /&gt;When the Rx FIFO is disabled (MCR[RFEN] bit is negated), an individual mask is&lt;BR /&gt;provided for each available Rx mailbox on a one-to-one correspondence. When the Rx&lt;BR /&gt;FIFO is enabled (MCR[RFEN] bit is asserted), an individual mask is provided for each&lt;BR /&gt;Rx FIFO ID filter table element on a one-to-one correspondence depending on the setting&lt;BR /&gt;of CTRL2[RFFN] (see Rx FIFO).&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;If Rx FIFO is enabled with 10 filter elements, RXIMR0-9 will have one-to-one correspondence with&amp;nbsp; RXFIFO filter elements. But,&amp;nbsp;what about &lt;SPAN&gt;RXIMR10-31&lt;/SPAN&gt;? Will RXIMR20 still correspond to MB20 when the RXFIFO is enabled? &lt;A class="jx-jive-macro-user" href="https://community.nxp.com/people/PetrS"&gt;PetrS&lt;/A&gt;‌&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 02 Apr 2020 10:51:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K144-CAN-Bus-Masking-And-Filtering/m-p/1031328#M6526</guid>
      <dc:creator>shivamshankarg</dc:creator>
      <dc:date>2020-04-02T10:51:00Z</dc:date>
    </item>
    <item>
      <title>Re: S32K144 CAN Bus Masking And Filtering?</title>
      <link>https://community.nxp.com/t5/S32K/S32K144-CAN-Bus-Masking-And-Filtering/m-p/1031329#M6527</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;yes,&amp;nbsp;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;RXIMR20 still correspond to MB20.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;BR, Petr&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 02 Apr 2020 18:59:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K144-CAN-Bus-Masking-And-Filtering/m-p/1031329#M6527</guid>
      <dc:creator>PetrS</dc:creator>
      <dc:date>2020-04-02T18:59:00Z</dc:date>
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