<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>S32KのトピックRe: sRe: On-chip secure NVM (S32K314)</title>
    <link>https://community.nxp.com/t5/S32K/On-chip-secure-NVM-S32K314/m-p/2414509#M61096</link>
    <description>&lt;P&gt;All these information you will find in HSE-B Firmware Reference Manual.&lt;/P&gt;
&lt;P&gt;It is a secure file, so following procedure is needed to follow unless you have already done it before:&lt;/P&gt;
&lt;P&gt;&lt;A href="https://www.nxp.com/docs/en/user-guide/nxp-secure-access-rights-registration.pdf" target="_blank"&gt;https://www.nxp.com/docs/en/user-guide/nxp-secure-access-rights-registration.pdf&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;For better understanding you may also see following link:&lt;/P&gt;
&lt;P&gt;&lt;A href="https://www.nxp.com/support/support/secure-access-rights:SEC-ACCESS" target="_blank"&gt;https://www.nxp.com/support/support/secure-access-rights:SEC-ACCESS&lt;/A&gt;&lt;/P&gt;</description>
    <pubDate>Fri, 18 Sep 2026 07:58:29 GMT</pubDate>
    <dc:creator>davidtosenovjan</dc:creator>
    <dc:date>2026-09-18T07:58:29Z</dc:date>
    <item>
      <title>On-chip secure NVM (S32K314)</title>
      <link>https://community.nxp.com/t5/S32K/On-chip-secure-NVM-S32K314/m-p/2414183#M61058</link>
      <description>&lt;P&gt;The Secure NVM mapping(FULL_MEM) described in HSE FW install for S32K3xx.pdf is as follows:&lt;/P&gt;&lt;P&gt;HSE data flash is&amp;nbsp;160KB，APP data flash is 88KB，total ：&amp;nbsp;160KB+88KB=248KB&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="luojing_0-1789619650388.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/396503i0D07BFFE379280C9/image-size/medium?v=v2&amp;amp;px=400" role="button" title="luojing_0-1789619650388.png" alt="luojing_0-1789619650388.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="luojing_1-1789619740147.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/396504iD9E51627818BC464/image-size/medium?v=v2&amp;amp;px=400" role="button" title="luojing_1-1789619740147.png" alt="luojing_1-1789619740147.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;However, the dflash allocation described in S32K3XXRM.pdf is as follows:&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;The total size of dflash is 128KB&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="luojing_2-1789619854070.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/396505i06438CCD6416933F/image-size/medium?v=v2&amp;amp;px=400" role="button" title="luojing_2-1789619854070.png" alt="luojing_2-1789619854070.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;Why are the Dflash sizes mentioned in the two documents different?&lt;/P&gt;&lt;P&gt;Note: I am using the HSE firmware version HSE_FW_S32K344_0_2_55_0_S2502.exe&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="luojing_3-1789620886731.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/396506i0C6BB5F5A4C9BD20/image-size/medium?v=v2&amp;amp;px=400" role="button" title="luojing_3-1789620886731.png" alt="luojing_3-1789620886731.png" /&gt;&lt;/span&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 17 Sep 2026 04:55:49 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/On-chip-secure-NVM-S32K314/m-p/2414183#M61058</guid>
      <dc:creator>luojing</dc:creator>
      <dc:date>2026-09-17T04:55:49Z</dc:date>
    </item>
    <item>
      <title>sRe: On-chip secure NVM (S32K314)</title>
      <link>https://community.nxp.com/t5/S32K/On-chip-secure-NVM-S32K314/m-p/2414359#M61071</link>
      <description>&lt;P&gt;It is described here:&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="davidtosenovjan_0-1789654479428.png" style="width: 584px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/396524i6D9C4AAC319F32C0/image-dimensions/584x593?v=v2" width="584" height="593" role="button" title="davidtosenovjan_0-1789654479428.png" alt="davidtosenovjan_0-1789654479428.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 17 Sep 2026 14:14:54 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/On-chip-secure-NVM-S32K314/m-p/2414359#M61071</guid>
      <dc:creator>davidtosenovjan</dc:creator>
      <dc:date>2026-09-17T14:14:54Z</dc:date>
    </item>
    <item>
      <title>Re: sRe: On-chip secure NVM (S32K314)</title>
      <link>https://community.nxp.com/t5/S32K/On-chip-secure-NVM-S32K314/m-p/2414363#M61073</link>
      <description>&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="luojing_0-1789654909700.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/396525i333775A7EA4A5B78/image-size/medium?v=v2&amp;amp;px=400" role="button" title="luojing_0-1789654909700.png" alt="luojing_0-1789654909700.png" /&gt;&lt;/span&gt;&lt;BR /&gt;Is it incorrect for HSE (FULL UMEM) Dflash size to be 160KB? Should it be 128KB-88KB=40KB?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 17 Sep 2026 14:25:40 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/On-chip-secure-NVM-S32K314/m-p/2414363#M61073</guid>
      <dc:creator>luojing</dc:creator>
      <dc:date>2026-09-17T14:25:40Z</dc:date>
    </item>
    <item>
      <title>Re: sRe: On-chip secure NVM (S32K314)</title>
      <link>https://community.nxp.com/t5/S32K/On-chip-secure-NVM-S32K314/m-p/2414365#M61074</link>
      <description>&lt;P&gt;Secure data flash starts at&amp;nbsp;0x10016000 (for FULL_MEM) having 168KB. It is the same on all derivatives.&lt;/P&gt;
&lt;P&gt;The appnote is not up to date.&lt;/P&gt;</description>
      <pubDate>Thu, 17 Sep 2026 14:33:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/On-chip-secure-NVM-S32K314/m-p/2414365#M61074</guid>
      <dc:creator>davidtosenovjan</dc:creator>
      <dc:date>2026-09-17T14:33:10Z</dc:date>
    </item>
    <item>
      <title>Re: sRe: On-chip secure NVM (S32K314)</title>
      <link>https://community.nxp.com/t5/S32K/On-chip-secure-NVM-S32K314/m-p/2414367#M61075</link>
      <description>&lt;P&gt;The HSE FW install for S32K3xx.pdf only specifies the range of HSE Pflash and dflash, without specifying the RAM range. What is the RAM range used by HSE?&lt;BR /&gt;What are the starting address and size?&lt;BR /&gt;Is there a specific document describing it?&lt;/P&gt;</description>
      <pubDate>Thu, 17 Sep 2026 14:43:28 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/On-chip-secure-NVM-S32K314/m-p/2414367#M61075</guid>
      <dc:creator>luojing</dc:creator>
      <dc:date>2026-09-17T14:43:28Z</dc:date>
    </item>
    <item>
      <title>Re: sRe: On-chip secure NVM (S32K314)</title>
      <link>https://community.nxp.com/t5/S32K/On-chip-secure-NVM-S32K314/m-p/2414509#M61096</link>
      <description>&lt;P&gt;All these information you will find in HSE-B Firmware Reference Manual.&lt;/P&gt;
&lt;P&gt;It is a secure file, so following procedure is needed to follow unless you have already done it before:&lt;/P&gt;
&lt;P&gt;&lt;A href="https://www.nxp.com/docs/en/user-guide/nxp-secure-access-rights-registration.pdf" target="_blank"&gt;https://www.nxp.com/docs/en/user-guide/nxp-secure-access-rights-registration.pdf&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;For better understanding you may also see following link:&lt;/P&gt;
&lt;P&gt;&lt;A href="https://www.nxp.com/support/support/secure-access-rights:SEC-ACCESS" target="_blank"&gt;https://www.nxp.com/support/support/secure-access-rights:SEC-ACCESS&lt;/A&gt;&lt;/P&gt;</description>
      <pubDate>Fri, 18 Sep 2026 07:58:29 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/On-chip-secure-NVM-S32K314/m-p/2414509#M61096</guid>
      <dc:creator>davidtosenovjan</dc:creator>
      <dc:date>2026-09-18T07:58:29Z</dc:date>
    </item>
  </channel>
</rss>

