S32K中的主题 Re: S32K142 LPSPI0 Master (lpspi_transfer example): SCK clock not toggling correctly

S32K142 LPSPI0 Master (lpspi_transfer example): SCK clock not toggling correctly

Resham_Bhattad — Tue, 25 Aug 2026 09:42:30 GMT

Hello NXP Community,

I am using the NXP lpspi_transfer_s32k142 example with LPSPI0 in Master mode on an S32K142 board, without major changes to the example configuration.

My issue is that the SCK/Clock waveform is not toggling correctly. I am monitoring SCK, MOSI, MISO and PCS with a logic analyzer.

For an 8-bit (1-byte) transfer, I expect 8 SCK clock pulses, but the logic analyzer shows an abnormal/continuous-looking clock waveform instead of the expected pulses.

Configuration:

LPSPI0 – Master
500 kHz
8-bit frame
PCS0
CPOL = Active High
CPHA = 1st edge
Transfer type = Interrupt

I have attached the logic analyzer screenshot showing the SCK waveform.

Could someone please help me understand why the SCK clock is not toggling correctly in the NXP example and what configuration I should check?

Thank you.

Re: S32K142 LPSPI0 Master (lpspi_transfer example): SCK clock not toggling correctly

Robin_Shen — Wed, 26 Aug 2026 05:21:07 GMT

The image you uploaded is too blurry; I can't see the SPI waveform clearly.

Did you modify the LPSPI0 configuration of lpspi_transfer_s32k142 to select PCS continuous?

lpspi_transfer_s32k142 LPSPI0 PCS continuous.png

It is recommended to use arrows or text to mark where you think there is a problem on a clear SPI waveform. This will help me quickly understand your question.

Best Regards,
Robin

Re: S32K142 LPSPI0 Master (lpspi_transfer example): SCK clock not toggling correctly

Resham_Bhattad — Wed, 26 Aug 2026 05:43:36 GMT

Hi Robin,

Thank you for your response.

In my current configuration, PCS continuous is unchecked, and the generated configuration has:

.isPcsContinuous = false

I have not modified this setting.

In the uploaded waveform, I am also not getting the expected clean SPI timing. For a 1-byte transfer, I expect 8 SCK clock pulses while PCS is asserted for the complete transfer (PCS active → 8 clock pulses → PCS inactive). However, my logic analyzer capture does not show this expected behavior clearly. The SCK pulses appear irregular, and the PCS/Enable signal is not showing the expected high/low behavior around the complete SPI frame.

I have attached the current waveform for reference.

Could you please confirm whether this PCS and SCK behavior is expected with the LPSPI_DRV_MasterTransferBlocking() API and the current LPSPI configuration?

I will also test with PCS continuous enabled and share the result.

Regards,
Resham

Re: S32K142 LPSPI0 Master (lpspi_transfer example): SCK clock not toggling correctly

Robin_Shen — Wed, 26 Aug 2026 06:08:31 GMT

If possible, I suggest you send me the modified test project so that I can quickly reproduce the problem you encountered on the S32K142EVB.

Re: S32K142 LPSPI0 Master (lpspi_transfer example): SCK clock not toggling correctly

Resham_Bhattad — Wed, 26 Aug 2026 09:55:07 GMT

Hi,

Please find attached the ZIP file containing the modified LPSPI transfer test project for the S32K142EVB.

Could you please check the project and let me know if the LPSPI transfer configuration is correct or if any changes are required?

Thanks for your support.

Best regards,
Resham

Re: S32K142 LPSPI0 Master (lpspi_transfer example): SCK clock not toggling correctly

Robin_Shen — Thu, 27 Aug 2026 08:15:08 GMT

Why can't I see the .mex file in the SPI.zip you sent? Without the .mex file, I have no way of knowing how you configured LPSPI. Which version of S32DS are you using? I imported your project, and it tells me you are using S32K1 SDK RTM 4.0.1. Please confirm the version of S32DS and SDK so I can install them for testing.

I'm unable to compile your project correctly using S32DS v3.4 with S32K1 SDK 4.0.2 and 4.0.3 installed. I suspect your S32DS SDK is not installed correctly, which is why there is no .mex file in your project.
Did you obtain the project from another colleague? Is it mandatory to use the same SDK version for development?
Please determine which version of the S32K1 SDK you need to install.
S32K1 SDK 4.0.3 can be installed by S32DS Extensions and Updates in S32DS v3.4.
As far as I know, S32K1 SDK 4.0.1 can currently only be available in S32DS v3.3.
S32K1 SDK 4.0.2 (SW32K1_S32DS_3.4.1_D2106.zip) can be installed in S32DS v3.4. For installation instructions, please refer to: S32 Design Studio v3.4 S32K1 Service Pack 1 released!

Re: S32K142 LPSPI0 Master (lpspi_transfer example): SCK clock not toggling correctly

Robin_Shen — Fri, 28 Aug 2026 08:12:03 GMT

After installing S32K1 SDK 4.0.1 by S32DS Extensions and Updates in S32DS v3.3, I was able to build the project correctly without errors.

install S32K1 SDK 4.0.1 in S32DSv3.3.pnginstall S32K1 SDK 4.0.1 in S32DSv3.3 S32DS Extensions and Updates.png

Below are the SPI waveforms I obtained while debugging your SPI project on the LPSPI0 pin of the S32K142EVB. I used a logic analyzer to capture the SPI waveforms for the following pins:

PTB0	PCS0	J4.5
PTB2	SCK0	J2.11
PTE1	SIN0	J5.14
PTB4	SOUT0	J2.7

The SPI waveforms appear to match your configuration. The logic analyzer I'm using is different from yours. I suggest you configure your logic analyzer according to the configuration shown in my screenshot.

debug LPSPI0 S32K1 SDK 4.0.1.png