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    <title>topic Re: How to Debug Multi Core with TRACE32 on S32K312? in S32K</title>
    <link>https://community.nxp.com/t5/S32K/How-to-Debug-Multi-Core-with-TRACE32-on-S32K312/m-p/2404396#M60453</link>
    <description>&lt;P&gt;I got it.&lt;/P&gt;&lt;P&gt;Thank you&amp;nbsp;Mr&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/37795"&gt;@lukaszadrapa&lt;/a&gt;&amp;nbsp;.&amp;nbsp;&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;</description>
    <pubDate>Thu, 13 Aug 2026 03:35:43 GMT</pubDate>
    <dc:creator>NghiaLX308</dc:creator>
    <dc:date>2026-08-13T03:35:43Z</dc:date>
    <item>
      <title>How to Debug Multi Core with TRACE32 on S32K312?</title>
      <link>https://community.nxp.com/t5/S32K/How-to-Debug-Multi-Core-with-TRACE32-on-S32K312/m-p/2402314#M60248</link>
      <description>&lt;P&gt;Dear NXP Support,&lt;/P&gt;&lt;P&gt;I am currently using TRACE32 to debug an S32K312 device.&lt;/P&gt;&lt;P&gt;The S32K312 is configured with two cores (Core 0 and Core 1). I can debug Core 0 without any issues, but I am unable to debug code running on Core 1.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="NghiaLX308_0-1785978107434.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/393823i2A7B6ABF19A491DF/image-size/medium?v=v2&amp;amp;px=400" alt="NghiaLX308_0-1785978107434.png" title="NghiaLX308_0-1785978107434.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;As shown in the attached screenshot, I set a breakpoint in the source code executed by Core 1. I also added a counter variable, and I can see that its value keeps increasing, which indicates that the code is indeed running. However, the breakpoint is never hit.&lt;/P&gt;&lt;P&gt;Could you please advise how to properly configure TRACE32 to debug both Core 0 and Core 1?&lt;/P&gt;&lt;P&gt;If there are any additional settings or initialization steps required for multi-core debugging on the S32K312, I would appreciate your guidance.&lt;/P&gt;&lt;P&gt;Here is my file cmm&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;; --------------------------------------------------------------------------------&lt;BR /&gt;; @Title: Demo script for S32K312-M7 on S32KXXCVB-176 (FLASH)&lt;BR /&gt;; @Description:&lt;BR /&gt;; Programs the sieve demo application into the processor internal flash and&lt;BR /&gt;; sets up a demo debug scenario.&lt;BR /&gt;; This script can be used as a template for flashing an application.&lt;BR /&gt;; Prerequisites:&lt;BR /&gt;; * Connect Debug Cable to J205&lt;BR /&gt;; or&lt;BR /&gt;; Connect Combiprobe/uTrace to J10&lt;BR /&gt;; @Keywords: ARM, Cortex-M7, Flash&lt;BR /&gt;; @Author: STK&lt;BR /&gt;; @Board: S32KXXCVB-176&lt;BR /&gt;; &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/9399"&gt;@Chip&lt;/a&gt;: S32K312-M7&lt;BR /&gt;; @Copyright: (C) 1989-2021 Lauterbach GmbH, licensed for use with TRACE32(R) only&lt;BR /&gt;; --------------------------------------------------------------------------------&lt;BR /&gt;; $Id: s32k312_sieve_flash.cmm 17943 2021-07-12 15:34:31Z skrausse $&lt;BR /&gt;;WinCLEAR&lt;BR /&gt;; --------------------------------------------------------------------------------&lt;BR /&gt;; initialize and start the debugger&lt;BR /&gt;RESet&lt;BR /&gt;SYStem.RESet&lt;BR /&gt;SYStem.CPU S32K312-M7&lt;BR /&gt;;SYStem.CPU MWCT2016S-M7&lt;BR /&gt;SYStem.CONFIG.DEBUGPORTTYPE JTAG&lt;BR /&gt;IF COMBIPROBE()||UTRACE()&lt;BR /&gt;(&lt;BR /&gt;SYStem.CONFIG.CONNECTOR MIPI20T&lt;BR /&gt;)&lt;BR /&gt;SYStem.Option DUALPORT ON&lt;BR /&gt;SYStem.MemAccess DAP&lt;BR /&gt;SYStem.JtagClock 10MHz&lt;BR /&gt;Trace.DISable&lt;BR /&gt;SYStem.Up&lt;BR /&gt;; ECC init for the internal SRAM&lt;BR /&gt;DO C:\T32\demo\arm\hardware\s32k3\scripts\init_sram.cmm&lt;BR /&gt;; --------------------------------------------------------------------------------&lt;BR /&gt;; Flash programming&lt;BR /&gt;; prepare flash programming (declarations)&lt;BR /&gt;DO ~~/demo/arm/flash/s32k3.cmm PREPAREONLY&lt;BR /&gt;FLASH.ChangeType 0x10016000--0x1003FFFF NOP&lt;BR /&gt;flash.erase.all&lt;BR /&gt;FLASH.ReProgram ALL&lt;BR /&gt;(&lt;/P&gt;&lt;P&gt;Data.LOAD.intelhex "project.hex"&lt;BR /&gt;;Data.LOAD.auto *&lt;BR /&gt;;Data.LOAD.s1record&lt;BR /&gt;; Adding IVT header&lt;BR /&gt;;Data.Set 0x00400000++0xF0 %Long 0x0 ; Init table with 0&lt;BR /&gt;;Data.Set 0x00400000 %Long 0x5aa55aa5 ; Magic number&lt;BR /&gt;;Data.Set 0x00400004 %Long 0x00000001 ; Boot configuration word (enable M7-0)&lt;BR /&gt;;Data.Set 0x0040000C %Long ADDRESS.OFFSET(__nvic_base) ; M7-0 application core start adddress&lt;BR /&gt;;Data.Set 0x00400024 %Long 0x00000000 ; LC configuration address&lt;BR /&gt;)&lt;/P&gt;&lt;P&gt;FLASH.ReProgram OFF&lt;BR /&gt;; --------------------------------------------------------------------------------&lt;BR /&gt;SYStem.Up&lt;BR /&gt;Break&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Data.LOAD.Elf "project.elf" /nocode&lt;/P&gt;&lt;P&gt;Go.direct main&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;SYStem.Mode Attach&lt;BR /&gt;&lt;BR /&gt;TrOnchip.Set CORERESET OFF&lt;BR /&gt;; --------------------------------------------------------------------------------&lt;BR /&gt;; open some windows&lt;BR /&gt;Mode.Hll&lt;/P&gt;&lt;P&gt;Thank you for your support.&lt;/P&gt;</description>
      <pubDate>Thu, 06 Aug 2026 01:05:06 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/How-to-Debug-Multi-Core-with-TRACE32-on-S32K312/m-p/2402314#M60248</guid>
      <dc:creator>NghiaLX308</dc:creator>
      <dc:date>2026-08-06T01:05:06Z</dc:date>
    </item>
    <item>
      <title>Re: How to Debug Multi Core with TRACE32 on S32K312?</title>
      <link>https://community.nxp.com/t5/S32K/How-to-Debug-Multi-Core-with-TRACE32-on-S32K312/m-p/2402378#M60254</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/261394"&gt;@NghiaLX308&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Are we really talking about S32K312? Because this is single core device:&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="lukaszadrapa_0-1785996399267.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/393843iE481D82E0F2F45AB/image-size/medium?v=v2&amp;amp;px=400" role="button" title="lukaszadrapa_0-1785996399267.png" alt="lukaszadrapa_0-1785996399267.png" /&gt;&lt;span class="lia-inline-image-caption" onclick="event.preventDefault();"&gt;lukaszadrapa_0-1785996399267.png&lt;/span&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Lukas&lt;/P&gt;</description>
      <pubDate>Thu, 06 Aug 2026 06:07:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/How-to-Debug-Multi-Core-with-TRACE32-on-S32K312/m-p/2402378#M60254</guid>
      <dc:creator>lukaszadrapa</dc:creator>
      <dc:date>2026-08-06T06:07:15Z</dc:date>
    </item>
    <item>
      <title>Re: How to Debug Multi Core with TRACE32 on S32K312?</title>
      <link>https://community.nxp.com/t5/S32K/How-to-Debug-Multi-Core-with-TRACE32-on-S32K312/m-p/2403182#M60341</link>
      <description>&lt;P&gt;Hello Mr&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/37795"&gt;@lukaszadrapa&lt;/a&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I’m sorry, that was my mistake.&lt;BR /&gt;The MCU is &lt;STRONG&gt;S32K322&lt;/STRONG&gt;.&lt;/P&gt;</description>
      <pubDate>Mon, 10 Aug 2026 06:58:04 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/How-to-Debug-Multi-Core-with-TRACE32-on-S32K312/m-p/2403182#M60341</guid>
      <dc:creator>NghiaLX308</dc:creator>
      <dc:date>2026-08-10T06:58:04Z</dc:date>
    </item>
    <item>
      <title>Re: How to Debug Multi Core with TRACE32 on S32K312?</title>
      <link>https://community.nxp.com/t5/S32K/How-to-Debug-Multi-Core-with-TRACE32-on-S32K312/m-p/2403303#M60358</link>
      <description>&lt;P&gt;I have two versions in my repository - one for S32K324 which opens two instances of Trace32 and second very simple for S32K396 which uses one instance of Trace32 only and then there are two scripts which can be used to switch between the cores. You can use these scripts as a reference to develop own solution.&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Lukas&lt;/P&gt;</description>
      <pubDate>Mon, 10 Aug 2026 12:26:17 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/How-to-Debug-Multi-Core-with-TRACE32-on-S32K312/m-p/2403303#M60358</guid>
      <dc:creator>lukaszadrapa</dc:creator>
      <dc:date>2026-08-10T12:26:17Z</dc:date>
    </item>
    <item>
      <title>Re: How to Debug Multi Core with TRACE32 on S32K312?</title>
      <link>https://community.nxp.com/t5/S32K/How-to-Debug-Multi-Core-with-TRACE32-on-S32K312/m-p/2404396#M60453</link>
      <description>&lt;P&gt;I got it.&lt;/P&gt;&lt;P&gt;Thank you&amp;nbsp;Mr&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/37795"&gt;@lukaszadrapa&lt;/a&gt;&amp;nbsp;.&amp;nbsp;&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;</description>
      <pubDate>Thu, 13 Aug 2026 03:35:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/How-to-Debug-Multi-Core-with-TRACE32-on-S32K312/m-p/2404396#M60453</guid>
      <dc:creator>NghiaLX308</dc:creator>
      <dc:date>2026-08-13T03:35:43Z</dc:date>
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