topic Re: Scrubbing ECC RAM in S32K

Scrubbing ECC RAM

durga_choudhury — Tue, 11 Aug 2026 02:27:34 GMT

MCU: S32K148

Driver: RTD 3.0.0

OS: Bare metal

With the above MCU, is there a way of 'scrubbing' the ECC SRAM? 'Scrubbing' means that if a correctable error is detected, the SRAM cell is updated with the correct value if the user configures some appropriate registers. Some competing products such as TI Hercules have this feature.

Re: Scrubbing ECC RAM

davidtosenovjan — Tue, 11 Aug 2026 07:05:18 GMT

S32K1 devices do not support a hardware SRAM scrubbing mechanism that would automatically write corrected data back to memory after a correctable ECC event. A software-based implementation is also not feasible, as single-bit SRAM ECC correction events are not reported by the ERM, so the application cannot identify the affected memory location.

While the S32K3 family also does not provide automatic SRAM scrubbing, it does report single-bit ECC events, which gives the application visibility into these errors and enables implementation of more advanced fault-handling strategies.

Re: Scrubbing ECC RAM

durga_choudhury — Tue, 11 Aug 2026 13:40:59 GMT

Thank you very much for the feedback.