<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>S32KのトピックRe: S32K1 Complementary PWM</title>
    <link>https://community.nxp.com/t5/S32K/S32K1-Complementary-PWM/m-p/2402401#M60258</link>
    <description>&lt;P&gt;Hi, Senlent, Tkx for your reply.&lt;BR /&gt;We are clear about how FTM outputs complementary PWM. At the chip level, how does it ensure that the complementary waveforms are not out of position? This is what our customers are interested in knowing.&lt;/P&gt;</description>
    <pubDate>Thu, 06 Aug 2026 06:49:23 GMT</pubDate>
    <dc:creator>Chenxu1</dc:creator>
    <dc:date>2026-08-06T06:49:23Z</dc:date>
    <item>
      <title>S32K1 Complementary PWM</title>
      <link>https://community.nxp.com/t5/S32K/S32K1-Complementary-PWM/m-p/2402337#M60252</link>
      <description>&lt;P&gt;Hi，NXP experts&lt;BR /&gt;We used the S32K142 chip in the air conditioning compressor project of Nissan. However, Nissan requested to know how the FTM of the chip ensures the achievement of complementary PWM output. Therefore, they would like to ask for assistance in providing explanations and supporting materials, or test reports for the verification of this function. Thank you.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Chenxu1_0-1785987344020.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/393834i4DAA0DE421A457C4/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Chenxu1_0-1785987344020.png" alt="Chenxu1_0-1785987344020.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;</description>
      <pubDate>Thu, 06 Aug 2026 03:35:59 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K1-Complementary-PWM/m-p/2402337#M60252</guid>
      <dc:creator>Chenxu1</dc:creator>
      <dc:date>2026-08-06T03:35:59Z</dc:date>
    </item>
    <item>
      <title>Re: S32K1 Complementary PWM</title>
      <link>https://community.nxp.com/t5/S32K/S32K1-Complementary-PWM/m-p/2402393#M60256</link>
      <description>&lt;P&gt;Hi@&lt;SPAN&gt;Chenxu1&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;It can read and test AN5303 and its provided bare-metal code.&lt;/P&gt;
&lt;P&gt;&lt;A href="https://www.nxp.com/docs/en/application-note/AN5303.pdf" target="_blank"&gt;https://www.nxp.com/docs/en/application-note/AN5303.pdf&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Senlent_0-1785997622463.png" style="width: 581px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/393846i86C45BE4123931A0/image-dimensions/581x662?v=v2" width="581" height="662" role="button" title="Senlent_0-1785997622463.png" alt="Senlent_0-1785997622463.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;These are some steps I recorded during my previous testing, for your reference.&lt;/P&gt;
&lt;P&gt;I set up &lt;STRONG&gt;complementary PWM mode and inserted a 2µs dead time&lt;/STRONG&gt; (I forgot to save the complete project, but the modification is very simple).&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Senlent_3-1785997707326.png" style="width: 628px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/393849iC86C9C1D122A3613/image-dimensions/628x439?v=v2" width="628" height="439" role="button" title="Senlent_3-1785997707326.png" alt="Senlent_3-1785997707326.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Senlent_1-1785997665931.png" style="width: 643px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/393847i8947DF4179D26C69/image-dimensions/643x482?v=v2" width="643" height="482" role="button" title="Senlent_1-1785997665931.png" alt="Senlent_1-1785997665931.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Senlent_2-1785997677611.png" style="width: 647px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/393848i697730D124AEC11D/image-dimensions/647x579?v=v2" width="647" height="579" role="button" title="Senlent_2-1785997677611.png" alt="Senlent_2-1785997677611.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 06 Aug 2026 06:31:55 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K1-Complementary-PWM/m-p/2402393#M60256</guid>
      <dc:creator>Senlent</dc:creator>
      <dc:date>2026-08-06T06:31:55Z</dc:date>
    </item>
    <item>
      <title>Re: S32K1 Complementary PWM</title>
      <link>https://community.nxp.com/t5/S32K/S32K1-Complementary-PWM/m-p/2402401#M60258</link>
      <description>&lt;P&gt;Hi, Senlent, Tkx for your reply.&lt;BR /&gt;We are clear about how FTM outputs complementary PWM. At the chip level, how does it ensure that the complementary waveforms are not out of position? This is what our customers are interested in knowing.&lt;/P&gt;</description>
      <pubDate>Thu, 06 Aug 2026 06:49:23 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K1-Complementary-PWM/m-p/2402401#M60258</guid>
      <dc:creator>Chenxu1</dc:creator>
      <dc:date>2026-08-06T06:49:23Z</dc:date>
    </item>
    <item>
      <title>Re: S32K1 Complementary PWM</title>
      <link>https://community.nxp.com/t5/S32K/S32K1-Complementary-PWM/m-p/2402404#M60259</link>
      <description>&lt;P&gt;Hi@&lt;SPAN&gt;Chenxu1&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;the chip-level protection is mainly architectural:&amp;nbsp;one channel defines the PWM timing, the companion channel is produced by internal complement logic, and optional dead-time/synchronized-update hardware preserves non-overlap and coherent updates.&lt;/P&gt;
&lt;P&gt;S32K-RM Rev14.1:&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Senlent_0-1785999338085.png" style="width: 643px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/393851i6A2FD2395FC61A41/image-dimensions/643x336?v=v2" width="643" height="336" role="button" title="Senlent_0-1785999338085.png" alt="Senlent_0-1785999338085.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 06 Aug 2026 06:57:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K1-Complementary-PWM/m-p/2402404#M60259</guid>
      <dc:creator>Senlent</dc:creator>
      <dc:date>2026-08-06T06:57:47Z</dc:date>
    </item>
  </channel>
</rss>

