<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: S32K311 LCU Rise/Fall Filter Deadtime Occasionally Reduced from 2 µs to 1 µs in S32K</title>
    <link>https://community.nxp.com/t5/S32K/S32K311-LCU-Rise-Fall-Filter-Deadtime-Occasionally-Reduced-from/m-p/2401364#M60179</link>
    <description>&lt;P&gt;Hi@&lt;SPAN&gt;Esakki&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;1.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Your value&amp;nbsp;&lt;/SPAN&gt;&lt;CODE class=""&gt;192 =&lt;/CODE&gt;&lt;CODE class=""&gt; 2 µs&lt;/CODE&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;implies an LCU filter tick of about：&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;2us / 192 =&amp;nbsp;&lt;SPAN class="mord"&gt;10.4167&lt;/SPAN&gt;&lt;SPAN class="mspace"&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN class="mord text"&gt;&lt;SPAN class="mord"&gt;ns&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;-&amp;gt; 1/ 10.4167 ns = 96MHz,&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;If the effective LCU/peripheral clock or prescaler changes, or if a different clock is selected than assumed, the real delay changes.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;2.Using an oscilloscope for testing is more accurate, and the waveform is related to the external capacitive reactance; a large capacitive reactance can also cause waveform instability.&lt;/SPAN&gt;&lt;/P&gt;</description>
    <pubDate>Mon, 03 Aug 2026 08:34:13 GMT</pubDate>
    <dc:creator>Senlent</dc:creator>
    <dc:date>2026-08-03T08:34:13Z</dc:date>
    <item>
      <title>S32K311 LCU Rise/Fall Filter Deadtime Occasionally Reduced from 2 µs to 1 µs</title>
      <link>https://community.nxp.com/t5/S32K/S32K311-LCU-Rise-Fall-Filter-Deadtime-Occasionally-Reduced-from/m-p/2401043#M60167</link>
      <description>&lt;P class=""&gt;Hi NXP Team,&lt;/P&gt;&lt;P&gt;I am using an &lt;STRONG&gt;S32K311&lt;/STRONG&gt; with &lt;STRONG&gt;RTD 5.0&lt;/STRONG&gt;.&lt;/P&gt;&lt;P&gt;The PWM signals are generated by &lt;STRONG&gt;eMIOS0&lt;/STRONG&gt; and routed directly to the &lt;STRONG&gt;LCU0&lt;/STRONG&gt; outputs:&lt;/P&gt;&lt;DIV class=""&gt;&lt;DIV class=""&gt;&lt;DIV class=""&gt;&lt;DIV class=""&gt;&lt;DIV class=""&gt;&lt;DIV class=""&gt;&lt;DIV class=""&gt;&lt;DIV class=""&gt;&lt;DIV class=""&gt;&lt;SPAN&gt;eMIOS0_CH0 -&amp;gt; LCU0_OUT0 &lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV class=""&gt;&lt;SPAN&gt;eMIOS0_CH1 -&amp;gt; LCU0_OUT1 &lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV class=""&gt;&lt;SPAN&gt;eMIOS0_CH2 -&amp;gt; LCU0_OUT2 &lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV class=""&gt;&lt;SPAN&gt;eMIOS0_CH3 -&amp;gt; LCU0_OUT3 &lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV class=""&gt;&lt;SPAN&gt;eMIOS0_CH4 -&amp;gt; LCU0_OUT4 &lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV class=""&gt;&lt;SPAN&gt;eMIOS0_CH5 -&amp;gt; LCU0_OUT5&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV class=""&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV class=""&gt;&lt;SPAN&gt;The LCU is configured to insert deadtime using the &lt;/SPAN&gt;&lt;STRONG&gt;Rise/Fall Filter&lt;/STRONG&gt;&lt;SPAN&gt;.&lt;/SPAN&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;DIV class=""&gt;&lt;DIV class=""&gt;&amp;nbsp;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;P&gt;&lt;STRONG&gt;Configuration&lt;/STRONG&gt;&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;MCU: S32K311&lt;/LI&gt;&lt;LI&gt;RTD Version: 5.0&lt;/LI&gt;&lt;LI&gt;PWM source: eMIOS0&lt;/LI&gt;&lt;LI&gt;Deadtime generation: LCU Rise/Fall Filter&lt;/LI&gt;&lt;LI&gt;Rise Filter on Highside Channels = 192&lt;/LI&gt;&lt;LI&gt;Fall Filter on Lowside Channels = 192&lt;/LI&gt;&lt;LI&gt;Configured deadtime = &lt;STRONG&gt;2 µs&lt;/STRONG&gt;&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;&lt;STRONG&gt;Observed behavior&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;Most switching events generate the expected &lt;STRONG&gt;2 µs deadtime&lt;/STRONG&gt;.&lt;/P&gt;&lt;P&gt;However, occasionally one transition (either the rising edge or the falling edge) has only about &lt;STRONG&gt;1 µs&lt;/STRONG&gt; deadtime instead of 2 µs. This occurs intermittently while the PWM frequency and duty cycle remain unchanged.&lt;/P&gt;&lt;P&gt;The attached logic analyzer capture shows this behavior.&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Questions&lt;/STRONG&gt;&lt;/P&gt;&lt;OL&gt;&lt;LI&gt;Is this variation expected when using the LCU Rise/Fall Filter?&lt;/LI&gt;&lt;LI&gt;Are there any synchronization requirements between the eMIOS outputs and the LCU filter?&lt;/LI&gt;&lt;LI&gt;Can the LCU filter occasionally shorten the programmed delay due to internal synchronization or clock-domain crossing?&lt;/LI&gt;&lt;LI&gt;Is there any known limitation or errata related to the Rise/Fall Filter on the S32K311?&lt;/LI&gt;&lt;/OL&gt;&lt;P&gt;Any guidance would be appreciated.&lt;/P&gt;&lt;P&gt;Thank you.&lt;/P&gt;</description>
      <pubDate>Sat, 01 Aug 2026 07:00:27 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K311-LCU-Rise-Fall-Filter-Deadtime-Occasionally-Reduced-from/m-p/2401043#M60167</guid>
      <dc:creator>Esakki</dc:creator>
      <dc:date>2026-08-01T07:00:27Z</dc:date>
    </item>
    <item>
      <title>Re: S32K311 LCU Rise/Fall Filter Deadtime Occasionally Reduced from 2 µs to 1 µs</title>
      <link>https://community.nxp.com/t5/S32K/S32K311-LCU-Rise-Fall-Filter-Deadtime-Occasionally-Reduced-from/m-p/2401364#M60179</link>
      <description>&lt;P&gt;Hi@&lt;SPAN&gt;Esakki&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;1.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Your value&amp;nbsp;&lt;/SPAN&gt;&lt;CODE class=""&gt;192 =&lt;/CODE&gt;&lt;CODE class=""&gt; 2 µs&lt;/CODE&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;implies an LCU filter tick of about：&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;2us / 192 =&amp;nbsp;&lt;SPAN class="mord"&gt;10.4167&lt;/SPAN&gt;&lt;SPAN class="mspace"&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN class="mord text"&gt;&lt;SPAN class="mord"&gt;ns&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;-&amp;gt; 1/ 10.4167 ns = 96MHz,&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;If the effective LCU/peripheral clock or prescaler changes, or if a different clock is selected than assumed, the real delay changes.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;2.Using an oscilloscope for testing is more accurate, and the waveform is related to the external capacitive reactance; a large capacitive reactance can also cause waveform instability.&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Mon, 03 Aug 2026 08:34:13 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K311-LCU-Rise-Fall-Filter-Deadtime-Occasionally-Reduced-from/m-p/2401364#M60179</guid>
      <dc:creator>Senlent</dc:creator>
      <dc:date>2026-08-03T08:34:13Z</dc:date>
    </item>
  </channel>
</rss>

