S32K comparator tolerance/offset

Sid_Zhou — Thu, 16 Jul 2026 09:30:54 GMT

we are having some test on the comparator of S32K116:
we apply an input voltage(238mV) to INN (or INP), use bandgap as reference, then we increase VOSEL from 0 to 255 and monitor when the comparator output changed.

Somehow, we see different tolerance/offset on MCU2 when the connection of input voltage and bandgap is swapped. (Details shown in Test1 and Test2)

1) Is this some kind of known feature like VAIO or something else?
2) For this tolerance/offset, is it stable and can we eliminate this by calibration?
(like record the trigger VOSEL at the target voltage)

Test1: Input Voltage on V-, Bandgap on V+, Low Speed Mode

Test2: Input Voltage on V+, Bandgap on V-, Low Speed Mode

topic S32K comparator tolerance/offset in S32K

S32K comparator tolerance/offset