<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>S32KのトピックHow to use LPI2C peripheral with DMA without enabling any interrupts?</title>
    <link>https://community.nxp.com/t5/S32K/How-to-use-LPI2C-peripheral-with-DMA-without-enabling-any/m-p/2394522#M59841</link>
    <description>&lt;DIV&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;I am working with an &lt;STRONG&gt;NXP S32K396 MCU&lt;/STRONG&gt; and would like to perform an &lt;STRONG&gt;LPI2C master transaction using eDMA without enabling any interrupts&lt;/STRONG&gt;. In my project, I am using the &lt;STRONG&gt;LPI2C1 peripheral&lt;/STRONG&gt;.&lt;/P&gt;&lt;P&gt;I can successfully perform LPI2C read and write transactions using DMA when the following interrupts are enabled:&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;LPI2C1_IRQn&lt;/LI&gt;&lt;LI&gt;eDMA0_DMATTCD_CH16_CH17_IRQn&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="rkhw_0-1783969062532.png" style="width: 491px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/392138iD77113A80A12FAF4/image-dimensions/491x64?v=v2" width="491" height="64" role="button" title="rkhw_0-1783969062532.png" alt="rkhw_0-1783969062532.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;/DIV&gt;&lt;DIV&gt;However, it appears that the RTD LPI2C DMA implementation depends on these interrupts.&lt;/DIV&gt;&lt;P&gt;In Lpi2c_Ip_MasterSendData(), the LPI2C master interrupts are always enabled by the driver:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="rkhw_1-1783969133234.png" style="width: 999px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/392139i427576FF0CD61F27/image-size/large?v=v2&amp;amp;px=999" role="button" title="rkhw_1-1783969133234.png" alt="rkhw_1-1783969133234.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;In addition, the DMA TCDs configured for TX and RX by Lpi2c_Ip_MasterTxDmaConfig() and Lpi2c_Ip_MasterRxDmaConfig() always enable the DMA major-loop completion interrupt:&lt;/P&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;P&gt;&lt;SPAN&gt;Lpi2c_DmaTransferList[9u].&lt;/SPAN&gt;&lt;SPAN&gt;Param&lt;/SPAN&gt;&lt;SPAN&gt; = &lt;/SPAN&gt;&lt;SPAN&gt;DMA_IP_CH_SET_CONTROL_EN_MAJOR_INTERRUPT&lt;/SPAN&gt;&lt;SPAN&gt;;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Lpi2c_DmaTransferList[9u].&lt;/SPAN&gt;&lt;SPAN&gt;Value&lt;/SPAN&gt;&lt;SPAN&gt; = 1U;&lt;/SPAN&gt;&lt;/P&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I also noticed that in other function - Lpi2c_Ip_MasterSendDataBlocking() does not appear to configure a DMA TCD for the LPI2C transfer.&lt;/P&gt;&lt;DIV&gt;I would like to perform the complete LPI2C transmit and receive transaction using DMA while keeping LPI2C1_IRQn disabled and the eDMA channel interrupt disabled.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;DIV&gt;If possible, could NXP provide an example for &lt;STRONG&gt;LPI2C master TX/RX using DMA with both LPI2C and DMA interrupts disabled&lt;/STRONG&gt;?&lt;/DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;P&gt;MCU: NXPS32K396&lt;/P&gt;&lt;P&gt;RTD: 6.0.0&lt;/P&gt;&lt;P&gt;NXP Studio: 3.6.1&lt;/P&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;P&gt;Any help would be greatly appreciated. Thanks a lot in advance!&lt;/P&gt;&lt;P&gt;If needed, I can attach my project.&lt;/P&gt;</description>
    <pubDate>Mon, 13 Jul 2026 19:36:09 GMT</pubDate>
    <dc:creator>rkhw</dc:creator>
    <dc:date>2026-07-13T19:36:09Z</dc:date>
    <item>
      <title>How to use LPI2C peripheral with DMA without enabling any interrupts?</title>
      <link>https://community.nxp.com/t5/S32K/How-to-use-LPI2C-peripheral-with-DMA-without-enabling-any/m-p/2394522#M59841</link>
      <description>&lt;DIV&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;I am working with an &lt;STRONG&gt;NXP S32K396 MCU&lt;/STRONG&gt; and would like to perform an &lt;STRONG&gt;LPI2C master transaction using eDMA without enabling any interrupts&lt;/STRONG&gt;. In my project, I am using the &lt;STRONG&gt;LPI2C1 peripheral&lt;/STRONG&gt;.&lt;/P&gt;&lt;P&gt;I can successfully perform LPI2C read and write transactions using DMA when the following interrupts are enabled:&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;LPI2C1_IRQn&lt;/LI&gt;&lt;LI&gt;eDMA0_DMATTCD_CH16_CH17_IRQn&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="rkhw_0-1783969062532.png" style="width: 491px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/392138iD77113A80A12FAF4/image-dimensions/491x64?v=v2" width="491" height="64" role="button" title="rkhw_0-1783969062532.png" alt="rkhw_0-1783969062532.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;/DIV&gt;&lt;DIV&gt;However, it appears that the RTD LPI2C DMA implementation depends on these interrupts.&lt;/DIV&gt;&lt;P&gt;In Lpi2c_Ip_MasterSendData(), the LPI2C master interrupts are always enabled by the driver:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="rkhw_1-1783969133234.png" style="width: 999px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/392139i427576FF0CD61F27/image-size/large?v=v2&amp;amp;px=999" role="button" title="rkhw_1-1783969133234.png" alt="rkhw_1-1783969133234.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;In addition, the DMA TCDs configured for TX and RX by Lpi2c_Ip_MasterTxDmaConfig() and Lpi2c_Ip_MasterRxDmaConfig() always enable the DMA major-loop completion interrupt:&lt;/P&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;P&gt;&lt;SPAN&gt;Lpi2c_DmaTransferList[9u].&lt;/SPAN&gt;&lt;SPAN&gt;Param&lt;/SPAN&gt;&lt;SPAN&gt; = &lt;/SPAN&gt;&lt;SPAN&gt;DMA_IP_CH_SET_CONTROL_EN_MAJOR_INTERRUPT&lt;/SPAN&gt;&lt;SPAN&gt;;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Lpi2c_DmaTransferList[9u].&lt;/SPAN&gt;&lt;SPAN&gt;Value&lt;/SPAN&gt;&lt;SPAN&gt; = 1U;&lt;/SPAN&gt;&lt;/P&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I also noticed that in other function - Lpi2c_Ip_MasterSendDataBlocking() does not appear to configure a DMA TCD for the LPI2C transfer.&lt;/P&gt;&lt;DIV&gt;I would like to perform the complete LPI2C transmit and receive transaction using DMA while keeping LPI2C1_IRQn disabled and the eDMA channel interrupt disabled.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;DIV&gt;If possible, could NXP provide an example for &lt;STRONG&gt;LPI2C master TX/RX using DMA with both LPI2C and DMA interrupts disabled&lt;/STRONG&gt;?&lt;/DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;P&gt;MCU: NXPS32K396&lt;/P&gt;&lt;P&gt;RTD: 6.0.0&lt;/P&gt;&lt;P&gt;NXP Studio: 3.6.1&lt;/P&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;P&gt;Any help would be greatly appreciated. Thanks a lot in advance!&lt;/P&gt;&lt;P&gt;If needed, I can attach my project.&lt;/P&gt;</description>
      <pubDate>Mon, 13 Jul 2026 19:36:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/How-to-use-LPI2C-peripheral-with-DMA-without-enabling-any/m-p/2394522#M59841</guid>
      <dc:creator>rkhw</dc:creator>
      <dc:date>2026-07-13T19:36:09Z</dc:date>
    </item>
    <item>
      <title>Re: How to use LPI2C peripheral with DMA without enabling any interrupts?</title>
      <link>https://community.nxp.com/t5/S32K/How-to-use-LPI2C-peripheral-with-DMA-without-enabling-any/m-p/2394591#M59844</link>
      <description>&lt;P&gt;Hi@&lt;SPAN&gt;rkhw&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;From the current driver implementation, the “Lpi2c_Ip_MasterSendData()” depend on both LPI2C master interrupts and DMA major-loop completion interrupts for transfer completion and state handling.&lt;/P&gt;
&lt;P&gt;Therefore, you cannot enable DMA without enabling interrupts. The RTD driver does not support this usage.&lt;/P&gt;</description>
      <pubDate>Tue, 14 Jul 2026 02:01:35 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/How-to-use-LPI2C-peripheral-with-DMA-without-enabling-any/m-p/2394591#M59844</guid>
      <dc:creator>Senlent</dc:creator>
      <dc:date>2026-07-14T02:01:35Z</dc:date>
    </item>
  </channel>
</rss>

