S32K中的主题 Re: Pad Types for LPSPI0 and EMAC

Pad Types for LPSPI0 and EMAC

Pouya — Sat, 20 Jun 2026 03:45:51 GMT

Hi,

According to the S32K344 technical reference manual, there are 4 pads types that support maximum switching frequency as follow:

- Standard: 10 MHz

- Standard Plus: 25 MHz

- Medium: 50 MHz

- Fast: 120 MHz

I am trying to understand what limitation the selection of the standard and standard plus pads introduce to the LPSPI and EMAC peripheral.

1. For EMAC, when RMII interface is used, the reference clock is 50 MHz. That means the RX/TXCLK, TXD0, TXD1, RXD0, and RXD1 pins should support 50 MHz signals. However in S32K344_257bga pin configuration, All RX/TXCLK, TXD0, TXD1, RXD0, and RXD1 pins are either on standard pads or standard plus pads. Does this means that RMII is not supported for S32K344?

2. For EMAC, when MII interface is used, the reference clock is 25 MHz for 100 Mbps Ethernet and 2.5 MHz for 10 Mbps Ethernet. Does this mean if we want to have 100Mbps ethernet using MII interface, the standard plus pads should be used?

3. For LPSPI, can you provide the LPSPI0 and LPSPI1-5 maximum rate that LPSPI support Reliably on standard and standard plus pads?

Thanks,

Pouya

Re: Pad Types for LPSPI0 and EMAC

PetrS — Mon, 22 Jun 2026 10:45:19 GMT

Hi,

1-2) For EMAC, the pad switching-frequency limitation is mainly relevant for signals driven by the MCU. RMII/MII is fully supported on S32K344.

For RMII, the 50 MHz REF_CLK and RX signals are inputs to the MCU, so there is no issue if these are on Standard / Standard Plus pads from the MCU output switching point of view. The critical signals are TXD[1:0] and TX_EN, as they are MCU outputs switching with the 50 MHz RMII clock. These should be assigned to Medium or preferably Fast pads, according to the recommended pin usage.

For MII 100 Mbps, the MCU transmit signals switch with the 25 MHz MII clock, so Standard Plus pads are generally feasible for these outputs; however, Medium pads are recommended for better margin. TX/RX clocks and other receive-side signals are inputs, so the pad output switching-frequency limitation is not the primary concern there.

Please check the IOMUX file attached to the RM, sheet “S32K34x_Ethernet Use cases”, which lists the recommended Ethernet pad usage.

3) As per the device RM and DS it is 10MHz in all SPI instances regardless of pin used, while on LPSPI0 it can be 15 or 20Mhz for specific pins used and mode, see table Table 48. LPSPI0 20 MHz and 15 MHz Combinations of the DS.

BR, Petr

Re: Pad Types for LPSPI0 and EMAC

Pouya — Mon, 22 Jun 2026 16:08:03 GMT

Hi,

Thank you for your response.

1-2) In S32K344-WB, the S32K344 processor is connected to the Ethernet Switch using RMII interface. However, TX_EN, TXD0 and TXD1 pins selected are all on standard plus pads (R3, U2 and U3). Wouldn't that cause an issue since for RMII the reference clock is 50 MHz and hence the switching frequency of MCU output should be 50 MHz while standard plus pads are used?

3) I have a 10 MHz clock for LPSPI, would LPSPI still work reliably all the time if I assign standard pads for LPSPI output in controller mode? Or since I am at the boundary I should assign standard pads for reliable communication?

In general, can you please explain more about the pad types frequency limitation and why they are only important for output signals from the processor point of view?

Thanks,

Pouya