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    <title>S32KのトピックRe: S32K146 FLEXCAN RJW config</title>
    <link>https://community.nxp.com/t5/S32K/S32K146-FLEXCAN-RJW-config/m-p/2382787#M59342</link>
    <description>&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="SaLan_0-1781746341737.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/389323i11A9E7ACBD75D289/image-size/medium?v=v2&amp;amp;px=400" role="button" title="SaLan_0-1781746341737.png" alt="SaLan_0-1781746341737.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;As shown in the figure, I set the RJW to 3 and made it larger than PSEG2, but I didn't get any “infeasible” warnings.&lt;BR /&gt;If possible, could you tell me what the implications are of configuring the registers this way?&lt;/P&gt;</description>
    <pubDate>Thu, 18 Jun 2026 01:35:27 GMT</pubDate>
    <dc:creator>SaLan</dc:creator>
    <dc:date>2026-06-18T01:35:27Z</dc:date>
    <item>
      <title>S32K146 FLEXCAN RJW config</title>
      <link>https://community.nxp.com/t5/S32K/S32K146-FLEXCAN-RJW-config/m-p/2382219#M59309</link>
      <description>&lt;P&gt;In the S32K146, will the RJW configuration of FLEXCAN have any impact compared to PSEG2?&lt;/P&gt;</description>
      <pubDate>Wed, 17 Jun 2026 03:18:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K146-FLEXCAN-RJW-config/m-p/2382219#M59309</guid>
      <dc:creator>SaLan</dc:creator>
      <dc:date>2026-06-17T03:18:11Z</dc:date>
    </item>
    <item>
      <title>Re: S32K146 FLEXCAN RJW config</title>
      <link>https://community.nxp.com/t5/S32K/S32K146-FLEXCAN-RJW-config/m-p/2382226#M59310</link>
      <description>Will a higher RJW value than the PSEG2 value have an impact?</description>
      <pubDate>Wed, 17 Jun 2026 03:37:20 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K146-FLEXCAN-RJW-config/m-p/2382226#M59310</guid>
      <dc:creator>SaLan</dc:creator>
      <dc:date>2026-06-17T03:37:20Z</dc:date>
    </item>
    <item>
      <title>Re: S32K146 FLEXCAN RJW config</title>
      <link>https://community.nxp.com/t5/S32K/S32K146-FLEXCAN-RJW-config/m-p/2382454#M59323</link>
      <description>&lt;P&gt;Hi@&lt;SPAN&gt;SaLan&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;For S32K146 FlexCAN, PSEG2 affects the nominal bit time and sample point, while RJW only limits resynchronization adjustment and is not part of the nominal bitrate calculation.&lt;/P&gt;</description>
      <pubDate>Wed, 17 Jun 2026 10:09:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K146-FLEXCAN-RJW-config/m-p/2382454#M59323</guid>
      <dc:creator>Senlent</dc:creator>
      <dc:date>2026-06-17T10:09:01Z</dc:date>
    </item>
    <item>
      <title>Re: S32K146 FLEXCAN RJW config</title>
      <link>https://community.nxp.com/t5/S32K/S32K146-FLEXCAN-RJW-config/m-p/2382509#M59329</link>
      <description>&lt;P&gt;According to the CAN protocol, SJW ≤ PSEG2 ≤ PSEG1, and SJW ≤ 4 Tq.&lt;BR /&gt;If SJW is configured to be greater than PSEG2 in the FLAXCAN register, will this have any impact?&lt;/P&gt;</description>
      <pubDate>Wed, 17 Jun 2026 11:57:02 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K146-FLEXCAN-RJW-config/m-p/2382509#M59329</guid>
      <dc:creator>SaLan</dc:creator>
      <dc:date>2026-06-17T11:57:02Z</dc:date>
    </item>
    <item>
      <title>Re: S32K146 FLEXCAN RJW config</title>
      <link>https://community.nxp.com/t5/S32K/S32K146-FLEXCAN-RJW-config/m-p/2382781#M59341</link>
      <description>&lt;P&gt;Hi@&lt;SPAN&gt;SaLan&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;When you configure FlexCan using S32 DS, it will explicitly tell you that it is not possible.&lt;/P&gt;</description>
      <pubDate>Thu, 18 Jun 2026 01:22:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K146-FLEXCAN-RJW-config/m-p/2382781#M59341</guid>
      <dc:creator>Senlent</dc:creator>
      <dc:date>2026-06-18T01:22:48Z</dc:date>
    </item>
    <item>
      <title>Re: S32K146 FLEXCAN RJW config</title>
      <link>https://community.nxp.com/t5/S32K/S32K146-FLEXCAN-RJW-config/m-p/2382787#M59342</link>
      <description>&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="SaLan_0-1781746341737.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/389323i11A9E7ACBD75D289/image-size/medium?v=v2&amp;amp;px=400" role="button" title="SaLan_0-1781746341737.png" alt="SaLan_0-1781746341737.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;As shown in the figure, I set the RJW to 3 and made it larger than PSEG2, but I didn't get any “infeasible” warnings.&lt;BR /&gt;If possible, could you tell me what the implications are of configuring the registers this way?&lt;/P&gt;</description>
      <pubDate>Thu, 18 Jun 2026 01:35:27 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K146-FLEXCAN-RJW-config/m-p/2382787#M59342</guid>
      <dc:creator>SaLan</dc:creator>
      <dc:date>2026-06-18T01:35:27Z</dc:date>
    </item>
    <item>
      <title>Re: S32K146 FLEXCAN RJW config</title>
      <link>https://community.nxp.com/t5/S32K/S32K146-FLEXCAN-RJW-config/m-p/2382817#M59344</link>
      <description>&lt;P&gt;Hi@&lt;SPAN&gt;SaLan&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;This was my mistake; I thought there was an error message indicating an RJW setting error.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Senlent_0-1781751975557.png" style="width: 601px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/389330iDF91E8C0D1E9A5EE/image-dimensions/601x315?v=v2" width="601" height="315" role="button" title="Senlent_0-1781751975557.png" alt="Senlent_0-1781751975557.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; RJW represents the extended time of the PESG1 segment and the shortened time of the PSEG2 segment during resynchronization. The shortening of the PSEG2 segment means that the &lt;STRONG&gt;sampling point&lt;/STRONG&gt; will be shifted backward, and if it is too large, it will lead to sampling errors.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;So CAN Bit Timing Requirements, it says that the re-synchronisation jump width cannot exceed 4 Time Quanta and it also must not exceed the number of Time Quanta in the PHASE_SEG1 segment.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 18 Jun 2026 03:07:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K146-FLEXCAN-RJW-config/m-p/2382817#M59344</guid>
      <dc:creator>Senlent</dc:creator>
      <dc:date>2026-06-18T03:07:16Z</dc:date>
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