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    <title>S32KのトピックRe: s32k322 EMAC RMII issue</title>
    <link>https://community.nxp.com/t5/S32K/s32k322-EMAC-RMII-issue/m-p/2379458#M59180</link>
    <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/233505"&gt;@PavelL&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;&lt;P&gt;Thanks for your reply. We have check some points provided.&lt;/P&gt;&lt;OL&gt;&lt;LI&gt;&lt;DIV class=""&gt;&lt;DIV class=""&gt;The MCU is powered on only after the switch is fully up and running (confirmed to be communicating with other ports). We added the delay shown in the figure, but it didn't help.&lt;/DIV&gt;&lt;/DIV&gt;&lt;/LI&gt;&lt;LI&gt;&lt;DIV class=""&gt;&lt;DIV class=""&gt;We checked the clock and reconfigured it, yet the RX counter still shows no new counts.&lt;/DIV&gt;&lt;/DIV&gt;&lt;/LI&gt;&lt;LI&gt;&lt;DIV class=""&gt;&lt;DIV class=""&gt;RMII mode is selected in the peripheral config.&lt;/DIV&gt;&lt;/DIV&gt;&lt;/LI&gt;&lt;LI&gt;&lt;DIV class=""&gt;&lt;DIV class=""&gt;The switch correctly receives and forwards RMII frames from the TX direction to other ports, so the switch config appears correct. We also scoped the TXCLK provide by switch and MCU RX0/RX1 signals, and the waveforms look fine — no obvious issue with frames from the switch.&lt;/DIV&gt;&lt;/DIV&gt;&lt;/LI&gt;&lt;LI&gt;&lt;DIV class=""&gt;&lt;DIV class=""&gt;We are cross-checking against the reference example.&lt;/DIV&gt;&lt;/DIV&gt;&lt;/LI&gt;&lt;/OL&gt;&lt;DIV class=""&gt;We are on RTD 6.0.0. The test project is attached for verification (apologies in advance for any messy code — this is test firmware).&lt;/DIV&gt;&lt;DIV class=""&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV class=""&gt;Best regards&lt;/DIV&gt;&lt;DIV class=""&gt;Yongxiang Li&lt;/DIV&gt;</description>
    <pubDate>Wed, 10 Jun 2026 10:08:47 GMT</pubDate>
    <dc:creator>YongxiangLi</dc:creator>
    <dc:date>2026-06-10T10:08:47Z</dc:date>
    <item>
      <title>s32k322 EMAC RMII issue</title>
      <link>https://community.nxp.com/t5/S32K/s32k322-EMAC-RMII-issue/m-p/2379246#M59164</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;DIV class=""&gt;&lt;SPAN&gt;&amp;nbsp; We&lt;/SPAN&gt; &lt;SPAN&gt;are&lt;/SPAN&gt; &lt;SPAN&gt;using&lt;/SPAN&gt; &lt;SPAN&gt;the&lt;/SPAN&gt; &lt;SPAN class=""&gt;&lt;SPAN&gt;NXP&lt;/SPAN&gt; &lt;SPAN&gt;S32K322&lt;/SPAN&gt;&lt;/SPAN&gt; &lt;SPAN&gt;MCU&lt;/SPAN&gt; &lt;SPAN&gt;and&lt;/SPAN&gt; &lt;SPAN&gt;experiencing&lt;/SPAN&gt; &lt;SPAN&gt;an&lt;/SPAN&gt; &lt;SPAN&gt;Ethernet&lt;/SPAN&gt; &lt;SPAN&gt;reception&lt;/SPAN&gt; &lt;SPAN&gt;issue:&lt;/SPAN&gt; &lt;SPAN class=""&gt;&lt;SPAN&gt;TX&lt;/SPAN&gt; &lt;SPAN&gt;(transmission)&lt;/SPAN&gt; &lt;SPAN&gt;works&lt;/SPAN&gt; &lt;SPAN&gt;normally,&lt;/SPAN&gt; &lt;SPAN&gt;but&lt;/SPAN&gt; &lt;SPAN&gt;RX&lt;/SPAN&gt; &lt;SPAN&gt;(reception)&lt;/SPAN&gt; &lt;SPAN&gt;does&lt;/SPAN&gt; &lt;SPAN&gt;not&lt;/SPAN&gt; &lt;SPAN&gt;function&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;SPAN&gt;.&lt;/SPAN&gt; &lt;SPAN&gt;On&lt;/SPAN&gt; &lt;SPAN&gt;the&lt;/SPAN&gt; &lt;SPAN&gt;hardware&lt;/SPAN&gt; &lt;SPAN&gt;side,&lt;/SPAN&gt; &lt;SPAN&gt;the&lt;/SPAN&gt; &lt;SPAN class=""&gt;&lt;SPAN&gt;RMII&lt;/SPAN&gt; &lt;SPAN&gt;interface&lt;/SPAN&gt;&lt;/SPAN&gt; &lt;SPAN&gt;is&lt;/SPAN&gt; &lt;SPAN&gt;directly&lt;/SPAN&gt; &lt;SPAN&gt;connected&lt;/SPAN&gt; &lt;SPAN&gt;to&lt;/SPAN&gt; &lt;SPAN&gt;an&lt;/SPAN&gt; &lt;SPAN&gt;Ethernet&lt;/SPAN&gt; &lt;SPAN&gt;switch,&lt;/SPAN&gt; &lt;SPAN&gt;and&lt;/SPAN&gt; &lt;SPAN&gt;we&lt;/SPAN&gt; &lt;SPAN&gt;have&lt;/SPAN&gt; &lt;SPAN&gt;verified&lt;/SPAN&gt; &lt;SPAN&gt;that&lt;/SPAN&gt; &lt;SPAN&gt;the&lt;/SPAN&gt; &lt;SPAN&gt;PCB&lt;/SPAN&gt; &lt;SPAN&gt;trace&lt;/SPAN&gt; &lt;SPAN&gt;length&lt;/SPAN&gt; &lt;SPAN&gt;matching&lt;/SPAN&gt; &lt;SPAN&gt;and&lt;/SPAN&gt; &lt;SPAN&gt;impedance&lt;/SPAN&gt; &lt;SPAN&gt;control&lt;/SPAN&gt; &lt;SPAN&gt;meet&lt;/SPAN&gt; &lt;SPAN&gt;the&lt;/SPAN&gt; &lt;SPAN&gt;design&lt;/SPAN&gt; &lt;SPAN&gt;requirements.&lt;/SPAN&gt; &lt;SPAN&gt;For&lt;/SPAN&gt; &lt;SPAN&gt;power&lt;/SPAN&gt; &lt;SPAN&gt;sequencing,&lt;/SPAN&gt; &lt;SPAN&gt;we&lt;/SPAN&gt; &lt;SPAN&gt;currently&lt;/SPAN&gt; &lt;SPAN&gt;ensure&lt;/SPAN&gt; &lt;SPAN&gt;manually&lt;/SPAN&gt; &lt;SPAN&gt;that&lt;/SPAN&gt; &lt;SPAN&gt;the&lt;/SPAN&gt; &lt;SPAN&gt;switch&lt;/SPAN&gt; &lt;SPAN&gt;completes&lt;/SPAN&gt; &lt;SPAN&gt;its&lt;/SPAN&gt; &lt;SPAN&gt;power-up&lt;/SPAN&gt; &lt;SPAN&gt;before&lt;/SPAN&gt; &lt;SPAN&gt;the&lt;/SPAN&gt; &lt;SPAN&gt;S32K322.&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV class=""&gt;&lt;SPAN&gt;During&lt;/SPAN&gt; &lt;SPAN&gt;testing,&lt;/SPAN&gt; &lt;SPAN&gt;we&lt;/SPAN&gt; &lt;SPAN&gt;have&lt;/SPAN&gt; &lt;SPAN&gt;the&lt;/SPAN&gt; &lt;SPAN&gt;switch&lt;/SPAN&gt; &lt;SPAN&gt;send&lt;/SPAN&gt; &lt;SPAN class=""&gt;&lt;SPAN&gt;ARP&lt;/SPAN&gt; &lt;SPAN&gt;packets&lt;/SPAN&gt;&lt;/SPAN&gt; &lt;SPAN&gt;and&lt;/SPAN&gt; &lt;SPAN&gt;have&lt;/SPAN&gt; &lt;SPAN&gt;measured&lt;/SPAN&gt; &lt;SPAN&gt;the&lt;/SPAN&gt; &lt;SPAN class=""&gt;&lt;SPAN&gt;RX-related&lt;/SPAN&gt; &lt;SPAN&gt;signal&lt;/SPAN&gt; &lt;SPAN&gt;waveforms&lt;/SPAN&gt;&lt;/SPAN&gt; &lt;SPAN&gt;with&lt;/SPAN&gt; &lt;SPAN&gt;an&lt;/SPAN&gt; &lt;SPAN&gt;oscilloscope,&lt;/SPAN&gt; &lt;SPAN&gt;all&lt;/SPAN&gt; &lt;SPAN&gt;of&lt;/SPAN&gt; &lt;SPAN&gt;which&lt;/SPAN&gt; &lt;SPAN&gt;appear&lt;/SPAN&gt; &lt;SPAN&gt;correct.&lt;/SPAN&gt; &lt;SPAN&gt;However,&lt;/SPAN&gt; &lt;SPAN&gt;the&lt;/SPAN&gt; &lt;SPAN&gt;S32K322&lt;/SPAN&gt; &lt;SPAN class=""&gt;&lt;SPAN&gt;EMAC&lt;/SPAN&gt; &lt;SPAN&gt;does&lt;/SPAN&gt; &lt;SPAN&gt;not&lt;/SPAN&gt; &lt;SPAN&gt;enter&lt;/SPAN&gt; &lt;SPAN&gt;the&lt;/SPAN&gt; &lt;SPAN&gt;receive&lt;/SPAN&gt; &lt;SPAN&gt;interrupt&lt;/SPAN&gt;&lt;/SPAN&gt; &lt;SPAN&gt;(the&lt;/SPAN&gt; &lt;SPAN&gt;same&lt;/SPAN&gt; &lt;SPAN&gt;waveforms&lt;/SPAN&gt; &lt;SPAN&gt;are&lt;/SPAN&gt; &lt;SPAN&gt;successfully&lt;/SPAN&gt; &lt;SPAN&gt;received&lt;/SPAN&gt; &lt;SPAN&gt;on&lt;/SPAN&gt; &lt;SPAN&gt;another&lt;/SPAN&gt; &lt;SPAN&gt;ECU&lt;/SPAN&gt; &lt;SPAN&gt;platform).&lt;/SPAN&gt; &lt;SPAN&gt;We&lt;/SPAN&gt; &lt;SPAN&gt;have&lt;/SPAN&gt; &lt;SPAN&gt;also&lt;/SPAN&gt; &lt;SPAN&gt;checked&lt;/SPAN&gt; &lt;SPAN&gt;the&lt;/SPAN&gt; &lt;SPAN&gt;EMAC&lt;/SPAN&gt; &lt;SPAN class=""&gt;&lt;SPAN&gt;receive&lt;/SPAN&gt; &lt;SPAN&gt;and&lt;/SPAN&gt; &lt;SPAN&gt;error&lt;/SPAN&gt; &lt;SPAN&gt;counters&lt;/SPAN&gt;&lt;/SPAN&gt; &lt;SPAN&gt;in&lt;/SPAN&gt; &lt;SPAN&gt;the&lt;/SPAN&gt; &lt;SPAN&gt;registers,&lt;/SPAN&gt; &lt;SPAN&gt;and&lt;/SPAN&gt; &lt;SPAN&gt;both&lt;/SPAN&gt; &lt;SPAN&gt;read&lt;/SPAN&gt; &lt;SPAN&gt;as&lt;/SPAN&gt; &lt;SPAN class=""&gt;&lt;SPAN&gt;zero&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;SPAN&gt;.&lt;/SPAN&gt; &lt;SPAN&gt;All&lt;/SPAN&gt; &lt;SPAN&gt;clock&lt;/SPAN&gt; &lt;SPAN&gt;frequency&lt;/SPAN&gt; &lt;SPAN&gt;configurations&lt;/SPAN&gt; &lt;SPAN&gt;have&lt;/SPAN&gt; &lt;SPAN&gt;been&lt;/SPAN&gt; &lt;SPAN&gt;confirmed&lt;/SPAN&gt; &lt;SPAN&gt;to&lt;/SPAN&gt; &lt;SPAN&gt;be&lt;/SPAN&gt; &lt;SPAN&gt;correct.&lt;/SPAN&gt; &lt;SPAN&gt;Please&lt;/SPAN&gt; &lt;SPAN&gt;help&lt;/SPAN&gt; &lt;SPAN&gt;provide&lt;/SPAN&gt; &lt;SPAN&gt;additional&lt;/SPAN&gt; &lt;SPAN&gt;troubleshooting&lt;/SPAN&gt; &lt;SPAN&gt;ideas&lt;/SPAN&gt; &lt;SPAN&gt;or&lt;/SPAN&gt; &lt;SPAN&gt;suggestions.&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV class=""&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV class=""&gt;&lt;SPAN&gt;Best regards&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV class=""&gt;&lt;SPAN&gt;Yongxiang Li&lt;/SPAN&gt;&lt;/DIV&gt;</description>
      <pubDate>Wed, 10 Jun 2026 02:29:52 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/s32k322-EMAC-RMII-issue/m-p/2379246#M59164</guid>
      <dc:creator>YongxiangLi</dc:creator>
      <dc:date>2026-06-10T02:29:52Z</dc:date>
    </item>
    <item>
      <title>Re: s32k322 EMAC RMII issue</title>
      <link>https://community.nxp.com/t5/S32K/s32k322-EMAC-RMII-issue/m-p/2379420#M59178</link>
      <description>&lt;P&gt;Hello&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/263626"&gt;@YongxiangLi&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;DIV class="scriptor-paragraph"&gt;&lt;SPAN&gt;A few areas look worth checking first.&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;Since TX works but both the RX packet counters and RX error counters remain at 0, I would currently suspect that the EMAC does not recognize valid RMII receive activity at all, rather than receiving frames and dropping them later.&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;DIV class="scriptor-paragraph"&gt;&amp;nbsp;&lt;/DIV&gt;
&lt;DIV class="scriptor-paragraph"&gt;&lt;SPAN&gt;The most important checks would be:&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;DIV class="scriptor-paragraph"&gt;&amp;nbsp;&lt;/DIV&gt;
&lt;DIV class="scriptor-paragraph"&gt;&lt;SPAN&gt;1) RMII reference clock timing during initialization&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;DIV class="scriptor-paragraph"&gt;&lt;SPAN&gt;Please verify that the external 50 MHz RMII reference clock from the switch is already present and stable at the S32K322 pin before the EMAC/pin/clock initialization is executed.&lt;/SPAN&gt;&lt;SPAN&gt;&amp;nbsp;Very likely, you will need to add small delay, as it is recommended on S32K3-T-BOX. Please notice also the very first row in code snippet below:&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;DIV class="scriptor-paragraph"&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="PavelL_0-1781082817961.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/388501i6782A97DE023CC68/image-size/medium?v=v2&amp;amp;px=400" role="button" title="PavelL_0-1781082817961.png" alt="PavelL_0-1781082817961.png" /&gt;&lt;/span&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;/DIV&gt;
&lt;DIV class="scriptor-paragraph"&gt;&lt;SPAN&gt;2) RMII clock configuration inside the MCU&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;DIV class="scriptor-paragraph"&gt;&lt;SPAN&gt;For S32K3 RMII, the MAC uses the 50 MHz RMII reference clock on EMAC_MII_RMII_TX_CLK, while the external RX_CLK pin is not used in RMII mode. However, the internal EMAC RX/TX clocks still need to be configured correctly (typically 25 MHz for 100 Mbps, derived from the 50 MHz RMII reference clock). Please double-check the EMAC clock mux/divider settings.&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;DIV class="scriptor-paragraph"&gt;&lt;SPAN&gt;&lt;A href="https://community.nxp.com/t5/S32K/RMII-clock-for-S32K3/td-p/2053530" target="_blank"&gt;RMII clock for S32K3&lt;/A&gt;&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;3) RMII mode selection&lt;/SPAN&gt;&lt;/P&gt;
&lt;DIV class="scriptor-paragraph"&gt;&lt;SPAN&gt;Please confirm that the gmac driver (for EMAC peripheral) is really configured for RMII mode (not MII) and that this selection is done early enough during initialization.&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;
&lt;DIV class="scriptor-paragraph"&gt;&lt;SPAN&gt;4) Switch-side RMII mode&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;DIV class="scriptor-paragraph"&gt;&lt;SPAN&gt;Because your MAC is connected directly to a switch port rather than to a discrete PHY, please also verify that the switch port is truly configured for RMII/rev-RMII operation and is driving the correct 50 MHz reference clock toward the MCU.&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;5) Alternatively, you may compare your project with one of my S32K344 EMAC lwIP projects&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&lt;A href="https://community.nxp.com/t5/S32K-Knowledge-Base/S32K-Examples/ta-p/1108990" target="_blank"&gt;S32K Examples&lt;/A&gt;&lt;/SPAN&gt;&lt;/P&gt;
&lt;DIV class="scriptor-paragraph"&gt;&amp;nbsp;&lt;/DIV&gt;
&lt;DIV class="scriptor-paragraph"&gt;&lt;SPAN&gt;To help narrow this down, could you please share:&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;DIV class="scriptor-paragraph"&gt;&lt;SPAN&gt;- What version of S32K3 RTD driver do you use?&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;DIV class="scriptor-paragraph"&gt;&lt;SPAN&gt;- Could you share your project in minimalistic version or mex file at least?&lt;/SPAN&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;DIV class="scriptor-paragraph"&gt;&amp;nbsp;&lt;/DIV&gt;
&lt;P&gt;Best regards,&lt;/P&gt;
&lt;P&gt;Pavel&lt;/P&gt;</description>
      <pubDate>Wed, 10 Jun 2026 09:15:54 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/s32k322-EMAC-RMII-issue/m-p/2379420#M59178</guid>
      <dc:creator>PavelL</dc:creator>
      <dc:date>2026-06-10T09:15:54Z</dc:date>
    </item>
    <item>
      <title>Re: s32k322 EMAC RMII issue</title>
      <link>https://community.nxp.com/t5/S32K/s32k322-EMAC-RMII-issue/m-p/2379458#M59180</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/233505"&gt;@PavelL&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;&lt;P&gt;Thanks for your reply. We have check some points provided.&lt;/P&gt;&lt;OL&gt;&lt;LI&gt;&lt;DIV class=""&gt;&lt;DIV class=""&gt;The MCU is powered on only after the switch is fully up and running (confirmed to be communicating with other ports). We added the delay shown in the figure, but it didn't help.&lt;/DIV&gt;&lt;/DIV&gt;&lt;/LI&gt;&lt;LI&gt;&lt;DIV class=""&gt;&lt;DIV class=""&gt;We checked the clock and reconfigured it, yet the RX counter still shows no new counts.&lt;/DIV&gt;&lt;/DIV&gt;&lt;/LI&gt;&lt;LI&gt;&lt;DIV class=""&gt;&lt;DIV class=""&gt;RMII mode is selected in the peripheral config.&lt;/DIV&gt;&lt;/DIV&gt;&lt;/LI&gt;&lt;LI&gt;&lt;DIV class=""&gt;&lt;DIV class=""&gt;The switch correctly receives and forwards RMII frames from the TX direction to other ports, so the switch config appears correct. We also scoped the TXCLK provide by switch and MCU RX0/RX1 signals, and the waveforms look fine — no obvious issue with frames from the switch.&lt;/DIV&gt;&lt;/DIV&gt;&lt;/LI&gt;&lt;LI&gt;&lt;DIV class=""&gt;&lt;DIV class=""&gt;We are cross-checking against the reference example.&lt;/DIV&gt;&lt;/DIV&gt;&lt;/LI&gt;&lt;/OL&gt;&lt;DIV class=""&gt;We are on RTD 6.0.0. The test project is attached for verification (apologies in advance for any messy code — this is test firmware).&lt;/DIV&gt;&lt;DIV class=""&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV class=""&gt;Best regards&lt;/DIV&gt;&lt;DIV class=""&gt;Yongxiang Li&lt;/DIV&gt;</description>
      <pubDate>Wed, 10 Jun 2026 10:08:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/s32k322-EMAC-RMII-issue/m-p/2379458#M59180</guid>
      <dc:creator>YongxiangLi</dc:creator>
      <dc:date>2026-06-10T10:08:47Z</dc:date>
    </item>
    <item>
      <title>Re: s32k322 EMAC RMII issue</title>
      <link>https://community.nxp.com/t5/S32K/s32k322-EMAC-RMII-issue/m-p/2380198#M59209</link>
      <description>&lt;P&gt;Hello&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/263626"&gt;@YongxiangLi&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;I reviewed your project with big attention to details. I can't see any reason why Rx doesn't work for you. There are small things which can be tuned, but they are so marginal.&lt;/P&gt;
&lt;P&gt;What VDD_HV_B do you use?&lt;/P&gt;
&lt;DIV class="scriptor-paragraph"&gt;&lt;SPAN&gt;As a diagnostic step, you may also try enabling promiscuous mode in the GMAC driver.&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;DIV class="scriptor-paragraph"&gt;&lt;SPAN&gt;This will allow the MAC to accept all incoming frames regardless of the destination MAC address filtering, which can help determine whether the issue is related to frame filtering or whether the RX path is not working at a lower level.&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;DIV class="scriptor-paragraph"&gt;&lt;SPAN&gt;If enabling promiscuous mode does not change the behavior and the RX counters still remain at zero, then the issue is more likely below the packet filtering level (for example RMII clocking, RX path initialization, or DMA/descriptor handling).&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;P&gt;&lt;LI-WRAPPER&gt;&lt;/LI-WRAPPER&gt;&lt;/P&gt;
&lt;DIV class="scriptor-paragraph"&gt;&lt;SPAN&gt;As another useful debug step, I would recommend stepping back and starting from the standard InternalLoopback example, adapting it to your hardware platform.&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;P&gt;&lt;SPAN&gt;First, please verify that the InternalLoopback example works correctly on your board. This helps confirm that the basic GMAC initialization, descriptor handling, buffer configuration, and software flow are working as expected on S32K322.&lt;/SPAN&gt;&lt;/P&gt;
&lt;DIV class="scriptor-paragraph"&gt;&lt;SPAN&gt;After that, you can uncheck the internal loopback mode and use the same project as a minimal baseline for communication with the external switch. In other words, keep the example as close as possible to the working reference design and test frame transmission and reception again.&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;P&gt;&lt;SPAN&gt;This approach may help isolate whether the issue is related to the hardware interface to the switch (for example RMII timing/clocking) or whether it is caused by some difference in the higher-level software integration of the current project.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;LI-WRAPPER&gt;&lt;/LI-WRAPPER&gt;&lt;/P&gt;
&lt;P&gt;Best regards,&lt;/P&gt;
&lt;P&gt;Pavel&lt;/P&gt;</description>
      <pubDate>Thu, 11 Jun 2026 11:39:34 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/s32k322-EMAC-RMII-issue/m-p/2380198#M59209</guid>
      <dc:creator>PavelL</dc:creator>
      <dc:date>2026-06-11T11:39:34Z</dc:date>
    </item>
    <item>
      <title>Re: s32k322 EMAC RMII issue</title>
      <link>https://community.nxp.com/t5/S32K/s32k322-EMAC-RMII-issue/m-p/2380582#M59231</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/233505"&gt;@PavelL&lt;/a&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Thank you for your patient support. We will continue the investigation over the weekend as per your suggestions and get back to you by next Monday or Tuesday.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Best regards&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Yongxiang Li&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Fri, 12 Jun 2026 06:55:19 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/s32k322-EMAC-RMII-issue/m-p/2380582#M59231</guid>
      <dc:creator>YongxiangLi</dc:creator>
      <dc:date>2026-06-12T06:55:19Z</dc:date>
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